cpldfit: version J.36 Xilinx Inc. Fitter Report Design Name: main Date: 5-14-2012, 8:37PM Device Used: XC2C256-7-TQ144 Fitting Status: Successful ************************* Mapped Resource Summary ************************** Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot 231/256 ( 90%) 701 /896 ( 78%) 534 /640 ( 83%) 136/256 ( 53%) 21 /118 ( 18%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO CTC CTR CTS CTE Block Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot Used/Tot FB1 16/16* 38/40* 34/56 0/ 6 1/1* 0/1 0/1 0/1 FB2 16/16* 38/40* 39/56 0/ 8 1/1* 0/1 0/1 0/1 FB3 16/16* 38/40* 32/56 0/ 6 1/1* 0/1 0/1 0/1 FB4 15/16 37/40 56/56* 0/ 8 1/1* 0/1 0/1 0/1 FB5 15/16 38/40* 46/56 0/ 5 1/1* 0/1 0/1 0/1 FB6 16/16* 38/40* 42/56 0/ 8 1/1* 0/1 0/1 0/1 FB7 13/16 38/40* 51/56 0/ 8 1/1* 0/1 0/1 0/1 FB8 16/16* 21/40 28/56 8/ 8* 1/1* 0/1 0/1 0/1 FB9 16/16* 36/40 50/56 0/ 8 1/1* 0/1 0/1 0/1 FB10 8/16 12/40 56/56* 0/ 9 0/1 0/1 0/1 0/1 FB11 12/16 31/40 56/56* 0/ 8 1/1* 0/1 0/1 0/1 FB12 16/16* 25/40 50/56 0/ 6 1/1* 0/1 0/1 0/1 FB13 16/16* 36/40 43/56 0/ 8 1/1* 0/1 0/1 0/1 FB14 10/16 38/40* 27/56 4/ 8 1/1* 0/1 0/1 0/1 FB15 15/16 37/40 56/56* 0/ 7 1/1* 0/1 0/1 0/1 FB16 15/16 33/40 35/56 7/ 7* 0/1 0/1 0/1 0/1 ----- ------- ------- ----- --- --- --- --- Total 231/256 534/640 701/896 19/118 14/16 0/16 0/16 0/16 CTC - Control Term Clock CTR - Control Term Reset CTS - Control Term Set CTE - Control Term Output Enable * - Resource is exhausted ** Global Control Resources ** GCK GSR GTS Used/Tot Used/Tot Used/Tot 1/3 0/1 0/4 Signal 'iclk' mapped onto global clock net GCK2. ** Pin Resources ** Signal Type Required Mapped | Pin Type Used Total ------------------------------------|------------------------------------ Input : 1 1 | I/O : 19 108 Output : 19 19 | GCK/IO : 1 3 Bidirectional : 0 0 | GTS/IO : 0 4 GCK : 1 1 | GSR/IO : 1 1 GTS : 0 0 | CDR/IO : 0 1 GSR : 0 0 | DGE/IO : 0 1 ---- ---- Total 21 21 End of Mapped Resource Summary ************************* Summary of Mapped Logic ************************ ** 19 Outputs ** Signal Total Total Loc Pin Pin Pin I/O I/O Slew Reg Reg Init Name Pts Inps No. Type Use STD Style Rate Use State blu<4> 1 2 FB8_1 44 I/O O LVCMOS18 FAST blu<3> 1 2 FB8_2 45 I/O O LVCMOS18 FAST blu<2> 1 2 FB8_3 46 I/O O LVCMOS18 FAST blu<1> 1 2 FB8_5 48 I/O O LVCMOS18 FAST blu<0> 1 2 FB8_6 49 I/O O LVCMOS18 FAST grn<5> 1 2 FB8_11 50 I/O O LVCMOS18 FAST grn<4> 1 2 FB8_12 51 I/O O LVCMOS18 FAST grn<3> 1 2 FB8_13 52 I/O O LVCMOS18 FAST pclk 1 2 FB14_6 68 I/O O LVCMOS18 FAST hsync 4 9 FB14_13 66 I/O O LVCMOS18 FAST vsync 2 10 FB14_14 64 I/O O LVCMOS18 FAST red<0> 1 2 FB14_16 61 I/O O LVCMOS18 FAST red<1> 1 2 FB16_5 60 I/O O LVCMOS18 FAST red<2> 1 2 FB16_6 59 I/O O LVCMOS18 FAST red<3> 1 2 FB16_11 58 I/O O LVCMOS18 FAST red<4> 1 2 FB16_12 57 I/O O LVCMOS18 FAST grn<0> 1 2 FB16_13 56 I/O O LVCMOS18 FAST grn<1> 1 2 FB16_15 54 I/O O LVCMOS18 FAST grn<2> 1 2 FB16_16 53 I/O O LVCMOS18 FAST ** 212 Buried Nodes ** Signal Total Total Loc Reg Reg Init Name Pts Inps Use State cos<0> 2 23 FB1_1 TFF RESET ang<5> 2 30 FB1_2 TFF RESET pbtn 10 21 FB1_3 DEFF RESET rcnt<8> 3 12 FB1_4 TFF RESET ang<4> 2 29 FB1_5 TFF RESET rcnt<9> 4 12 FB1_6 DFF RESET ang<3> 2 28 FB1_7 TFF RESET ang<2> 2 27 FB1_8 TFF RESET ang<1> 2 26 FB1_9 TFF RESET ang<0> 2 25 FB1_10 TFF RESET angf<2> 2 24 FB1_11 TFF RESET sin<0> 2 23 FB1_12 TFF RESET sin<2> 5 25 FB1_13 TFF RESET cos<1> 5 26 FB1_14 TFF RESET angf<1> 2 23 FB1_15 TFF RESET angf<0> 2 22 FB1_16 TFF RESET Mcompar_ypos_cmp_ge0000_N1 3 8 FB2_1 cos<3> 3 24 FB2_2 TFF RESET rcnt<5> 3 9 FB2_3 TFF RESET N_PZ_883 5 9 FB2_4 rcnt<6> 3 10 FB2_5 TFF RESET sin<7> 3 24 FB2_6 TFF RESET sin<4> 3 24 FB2_7 TFF RESET sin<5> 3 25 FB2_8 TFF RESET sin<6> 3 26 FB2_9 TFF RESET sin<8> 3 28 FB2_10 TFF RESET sin<9> 3 29 FB2_11 TFF RESET rcnt<7> 3 11 FB2_12 TFF RESET sin<1> 3 24 FB2_13 TFF RESET N_PZ_1144 3 25 FB2_14 N_PZ_1143 3 25 FB2_15 sin<10> 3 30 FB2_16 TFF RESET pcnt<0> 2 3 FB3_1 DFF RESET N_PZ_1175 1 3 FB3_2 pcnt<1> 3 4 FB3_3 DFF RESET N_PZ_1237 2 25 FB3_4 rcnt<4> 3 8 FB3_5 TFF RESET N_PZ_1182 2 27 FB3_6 sblu_not0001 2 26 FB3_7 sred<0> 3 27 FB3_8 TFF/S SET Signal Total Total Loc Reg Reg Init Name Pts Inps Use State sgrn<0> 3 27 FB3_9 TFF RESET N_PZ_1222 3 27 FB3_10 sred<1> 3 26 FB3_11 TFF/S SET sred<2> 3 27 FB3_12 TFF/S SET sred<3> 3 28 FB3_13 TFF/S SET N_PZ_768 2 7 FB3_14 sred<4> 3 29 FB3_15 TFF/S SET cos<2> 3 21 FB3_16 TFF RESET xclk 0 0 FB4_2 TFF RESET N_PZ_1165 1 2 FB4_3 ymem<9> 4 14 FB4_4 DFF RESET ymem<13> 7 19 FB4_5 DFF RESET ymem<12> 8 17 FB4_6 DFF RESET xmem<9> 4 14 FB4_7 DFF RESET xmem<1> 4 14 FB4_8 DFF RESET xmem<14> 7 15 FB4_9 DFF RESET xmem<10> 4 15 FB4_10 DFF RESET xmem<11> 6 17 FB4_11 DFF RESET ymem<11> 7 16 FB4_12 DFF RESET xmem<12> 7 18 FB4_13 DFF RESET ymem<10> 4 14 FB4_14 DFF RESET xmem<13> 6 20 FB4_15 DFF RESET xmem<15> 10 22 FB4_16 DFF RESET N_PZ_810 3 4 FB5_1 pcnt<5> 4 5 FB5_3 DFF RESET xmem_Madd__add0000__or0003 3 3 FB5_4 sin_Maddsub__addsub0000__or0003 3 3 FB5_5 N_PZ_808 3 3 FB5_6 pcnt<6> 4 6 FB5_7 TFF RESET pcnt<7> 4 7 FB5_8 TFF RESET xmem<5> 4 15 FB5_9 TFF RESET xmem<4> 4 15 FB5_10 TFF RESET xmem<3> 4 15 FB5_11 TFF RESET ymem<1> 7 17 FB5_12 DFF RESET ymem<0> 3 14 FB5_13 TFF RESET N_PZ_807 3 3 FB5_14 xmem<0> 3 14 FB5_15 TFF RESET sin<3> 3 21 FB5_16 TFF RESET N_PZ_846 1 3 FB6_1 ymem_Msub__sub0000__or0004 3 3 FB6_2 Signal Total Total Loc Reg Reg Init Name Pts Inps Use State xmem<6> 4 15 FB6_3 TFF RESET xmem_Madd__add0000__or0005 3 3 FB6_4 xmem<8> 4 15 FB6_5 TFF RESET N_PZ_1281 4 5 FB6_6 N_PZ_1087 3 5 FB6_7 N_PZ_909 2 4 FB6_8 N_PZ_1200 1 2 FB6_9 mode<1> 2 2 FB6_10 TFF RESET mode<0> 1 1 FB6_11 TFF RESET N_PZ_811 3 3 FB6_12 N_PZ_809 3 3 FB6_13 ymem<4> 4 15 FB6_14 TFF RESET ymem<3> 4 15 FB6_15 TFF RESET xmem<7> 4 15 FB6_16 TFF RESET N_PZ_1151 2 4 FB7_1 ymem<2> 4 13 FB7_2 TFF RESET ymem<8> 4 15 FB7_3 TFF RESET ymem<7> 4 15 FB7_4 TFF RESET ymem<6> 4 15 FB7_7 TFF RESET ymem<5> 4 15 FB7_8 TFF RESET ymem<15> 10 18 FB7_9 DFF RESET ymem<14> 9 20 FB7_10 DFF RESET ymem_Msub__sub0000__or0006 3 3 FB7_12 ymem_Msub__sub0000__or0002 3 3 FB7_13 N_PZ_813 3 3 FB7_14 N_PZ_812 3 3 FB7_15 N_PZ_1289 4 5 FB7_16 sgrn<4> 3 10 FB8_4 TFF RESET sgrn<5> 3 11 FB8_7 TFF RESET sblu<2> 4 7 FB8_8 TFF RESET sblu<3> 4 8 FB8_9 TFF RESET sblu<4> 4 9 FB8_10 TFF RESET sblu<1> 6 9 FB8_14 TFF RESET sblu_cmp_ge0000 1 5 FB8_15 N_PZ_761 1 5 FB8_16 xpos<2> 5 6 FB9_1 TFF RESET N_PZ_850 3 4 FB9_2 N_PZ_1290 3 5 FB9_3 xpos<1> 5 7 FB9_4 TFF RESET xmem_Madd__add0000__or0001 5 7 FB9_5 Signal Total Total Loc Reg Reg Init Name Pts Inps Use State xpos<0> 4 5 FB9_6 DFF RESET pcnt<3> 3 4 FB9_7 DFF RESET pcnt<9> 3 8 FB9_8 DFF RESET pcnt<8> 3 6 FB9_9 TFF RESET pcnt<4> 3 6 FB9_10 DFF RESET pcnt<2> 3 6 FB9_11 DFF RESET N_PZ_1174 2 3 FB9_12 ypos<0> 4 5 FB9_13 DFF RESET N_PZ_854 3 4 FB9_14 ypos<1> 5 7 FB9_15 TFF RESET xmem<2> 8 16 FB9_16 TFF RESET slice0000_rom0000<11> 6 7 FB10_7 cos_Maddsub__addsub0000_or0002_xor0000 8 7 FB10_8 sin_Maddsub__addsub0000_or0003_xor0000 6 8 FB10_9 slice0000_rom0000<13> 5 8 FB10_10 cos_Maddsub__addsub0000_or0003_xor0000 8 9 FB10_11 N_PZ_971 6 9 FB10_13 cos_Maddsub__addsub0000_or0001_xor0000 11 12 FB10_15 slice0000_rom0000<12> 6 5 FB10_16 ypos<15> 5 11 FB11_1 TFF RESET pix 18 10 FB11_2 DFF RESET xpos<10> 5 6 FB11_3 TFF RESET xpos<11> 5 7 FB11_4 TFF RESET xpos<12> 5 8 FB11_7 TFF RESET xpos<13> 5 9 FB11_8 TFF RESET xpos<14> 5 10 FB11_9 TFF RESET xpos<15> 5 11 FB11_10 TFF RESET cos<4> 2 3 FB11_13 TFF RESET sblu<0> 2 2 FB11_14 TFF RESET ypos<13> 5 9 FB11_15 TFF RESET ypos<14> 5 10 FB11_16 TFF RESET xpos<5> 5 6 FB12_1 TFF RESET xpos<3> 4 6 FB12_2 TFF RESET xpos<6> 5 6 FB12_3 TFF RESET N_PZ_902 3 4 FB12_4 N_PZ_840 3 4 FB12_5 cos<5> 3 4 FB12_6 TFF RESET cos<6> 3 5 FB12_7 TFF RESET cos<7> 3 6 FB12_8 TFF RESET cos<8> 3 7 FB12_9 TFF/S SET Signal Total Total Loc Reg Reg Init Name Pts Inps Use State cos<9> 3 8 FB12_10 TFF/S SET Madd_xpos_addsub0000__or0003 5 5 FB12_11 xpos<4> 7 8 FB12_12 TFF RESET N_PZ_1161 3 4 FB12_13 xpos<9> 5 6 FB12_14 TFF RESET N_PZ_852 3 3 FB12_15 cos<10> 3 9 FB12_16 TFF RESET ypos<5> 5 6 FB13_1 TFF RESET N_PZ_903 3 4 FB13_2 N_PZ_842 3 4 FB13_3 rcnt<2> 3 6 FB13_4 TFF RESET ypos<2> 5 6 FB13_5 TFF RESET ypos<12> 5 8 FB13_6 TFF RESET rcnt<1> 3 5 FB13_7 TFF RESET rcnt<0> 3 4 FB13_8 DFF RESET sgrn_cmp_le0000 1 6 FB13_9 N_PZ_1029 1 6 FB13_10 sgrn<1> 3 4 FB13_11 TFF RESET ypos<11> 5 7 FB13_12 TFF RESET ypos<10> 5 6 FB13_13 TFF RESET rcnt<3> 3 7 FB13_14 TFF RESET sgrn<2> 3 8 FB13_15 TFF RESET sgrn<3> 3 9 FB13_16 TFF RESET N_PZ_1217 2 3 FB14_8 Madd_xpos_addsub0000__or0007 5 5 FB14_9 xpos<8> 7 8 FB14_10 TFF RESET xpos<7> 4 6 FB14_11 TFF RESET sred_cmp_le0000 1 5 FB14_12 N_PZ_1035 1 5 FB14_15 ypos<7> 4 6 FB15_1 TFF RESET N_PZ_1080 3 3 FB15_3 ypos<9> 5 6 FB15_4 TFF RESET N_PZ_905 3 4 FB15_5 N_PZ_844 3 4 FB15_6 ypos<6> 5 6 FB15_7 TFF RESET ypos<3> 4 6 FB15_8 TFF RESET Madd_ypos_addsub0000__or0003 5 5 FB15_9 ypos<4> 7 8 FB15_10 TFF RESET N_PZ_1136 2 4 FB15_11 N_PZ_739 3 4 FB15_12 Signal Total Total Loc Reg Reg Init Name Pts Inps Use State cos_Maddsub__addsub0000_or0009_xor0000 2 3 FB15_13 N_PZ_1088 3 5 FB15_14 Madd_ypos_addsub0000__or0007 5 5 FB15_15 ypos<8> 7 8 FB15_16 TFF RESET N_PZ_858 5 5 FB16_2 sin_Maddsub__addsub0000__or0001 4 5 FB16_3 N_PZ_859 5 4 FB16_4 N_PZ_1176 2 4 FB16_7 N_PZ_900 3 4 FB16_8 N_PZ_838 3 4 FB16_9 cos_Maddsub__addsub0000__or0002 3 3 FB16_10 N_PZ_856 3 3 FB16_14 ** 2 Inputs ** Signal Loc Pin Pin Pin I/O I/O Name No. Type Use STD Style btn FB1_3 143 GSR/I/O I LVCMOS18 KPR iclk FB6_4 38 GCK/I/O GCK/I LVCMOS18 KPR Legend: Pin No. - ~ - User Assigned I/O Style - OD - OpenDrain - PU - Pullup - KPR - Keeper - S - SchmittTrigger - DG - DataGate Reg Use - LATCH - Transparent latch - DFF - D-flip-flop - DEFF - D-flip-flop with clock enable - TFF - T-flip-flop - TDFF - Dual-edge-triggered T-flip-flop - DDFF - Dual-edge-triggered flip-flop - DDEFF - Dual-edge-triggered flip-flop with clock enable /S (after any above flop/latch type) indicates initial state is Set ************************** Function Block Details ************************ Legend: Total Pt - Total product terms used by the macrocell signal Loc - Location where logic was mapped in device Pin Type/Use - I - Input GCK - Global clock O - Output GTS - Global Output Enable (b) - Buried macrocell GSR - Global Set/Reset VRF - Vref Pin No. - ~ - User Assigned *********************************** FB1 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 34/22 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use cos<0> 2 FB1_1 (b) (b) + ang<5> 2 FB1_2 (b) (b) + pbtn 10 FB1_3 143 GSR/I/O I + rcnt<8> 3 FB1_4 142 I/O (b) + ang<4> 2 FB1_5 (b) (b) + rcnt<9> 4 FB1_6 140 I/O (b) + ang<3> 2 FB1_7 (b) (b) + ang<2> 2 FB1_8 (b) (b) + ang<1> 2 FB1_9 (b) (b) + ang<0> 2 FB1_10 (b) (b) + angf<2> 2 FB1_11 (b) (b) + sin<0> 2 FB1_12 139 I/O (b) + sin<2> 5 FB1_13 138 I/O (b) + cos<1> 5 FB1_14 137 I/O (b) + angf<1> 2 FB1_15 (b) (b) + angf<0> 2 FB1_16 (b) (b) + Signals Used by Logic in Function Block 1: N_PZ_883 14: mode<0> 27: rcnt<2> 2: N_PZ_971 15: pcnt<0> 28: rcnt<3> 3: ang<0> 16: pcnt<1> 29: rcnt<4> 4: ang<1> 17: pcnt<2> 30: rcnt<5> 5: ang<2> 18: pcnt<3> 31: rcnt<6> 6: ang<3> 19: pcnt<4> 32: rcnt<7> 7: ang<4> 20: pcnt<5> 33: rcnt<8> 8: ang<5> 21: pcnt<6> 34: rcnt<9> 9: angf<0> 22: pcnt<7> 35: sin_Maddsub__addsub0000__or0001 10: angf<1> 23: pcnt<8> 36: slice0000_rom0000<11> 11: angf<2> 24: pcnt<9> 37: slice0000_rom0000<13> 12: cos<0> 25: rcnt<0> 38: xclk 13: cos_Maddsub__addsub0000_or0001_xor0000 26: rcnt<1> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs cos<0> .X...........XXXXXXXXXXXXXXXXXXXXX...X.. 23 ang<5> ..XXXXX.XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 30 pbtn ..............XXXXXXXXXXXXXXXXXXXX...X.. 21 rcnt<8> X.......................XXXXXXXXXX...X.. 12 ang<4> ..XXXX..XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 29 rcnt<9> X.......................XXXXXXXXXX...X.. 12 ang<3> ..XXX...XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 28 ang<2> ..XX....XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 27 ang<1> ..X.....XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 26 ang<0> ........XXX..XXXXXXXXXXXXXXXXXXXXX...X.. 25 angf<2> ........XX...XXXXXXXXXXXXXXXXXXXXX...X.. 24 sin<0> .............XXXXXXXXXXXXXXXXXXXXX.X.X.. 23 sin<2> .......X.....XXXXXXXXXXXXXXXXXXXXXX.XX.. 25 cos<1> .X.....X...XXXXXXXXXXXXXXXXXXXXXXX...X.. 26 angf<1> ........X....XXXXXXXXXXXXXXXXXXXXX...X.. 23 angf<0> .............XXXXXXXXXXXXXXXXXXXXX...X.. 22 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB2 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 39/17 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use Mcompar_ypos_cmp_ge0000_N1 3 FB2_1 2 GTS/I/O (b) cos<3> 3 FB2_2 (b) (b) + rcnt<5> 3 FB2_3 3 GTS/I/O (b) + N_PZ_883 5 FB2_4 4 I/O (b) rcnt<6> 3 FB2_5 5 GTS/I/O (b) + sin<7> 3 FB2_6 (b) (b) + sin<4> 3 FB2_7 (b) (b) + sin<5> 3 FB2_8 (b) (b) + sin<6> 3 FB2_9 (b) (b) + sin<8> 3 FB2_10 (b) (b) + sin<9> 3 FB2_11 (b) (b) + rcnt<7> 3 FB2_12 6 GTS/I/O (b) + sin<1> 3 FB2_13 7 I/O (b) + N_PZ_1144 3 FB2_14 9 I/O (b) N_PZ_1143 3 FB2_15 10 I/O (b) sin<10> 3 FB2_16 (b) (b) + Signals Used by Logic in Function Block 1: N_PZ_1217 14: pcnt<4> 27: rcnt<7> 2: N_PZ_739 15: pcnt<5> 28: rcnt<8> 3: N_PZ_883 16: pcnt<6> 29: rcnt<9> 4: cos<3> 17: pcnt<7> 30: sin<4> 5: cos_Maddsub__addsub0000__or0002 18: pcnt<8> 31: sin<5> 6: cos_Maddsub__addsub0000_or0003_xor0000 19: pcnt<9> 32: sin<6> 7: cos_Maddsub__addsub0000_or0009_xor0000 20: rcnt<0> 33: sin<7> 8: mode<0> 21: rcnt<1> 34: sin<8> 9: pbtn.COMB 22: rcnt<2> 35: sin<9> 10: pcnt<0> 23: rcnt<3> 36: sin_Maddsub__addsub0000__or0003 11: pcnt<1> 24: rcnt<4> 37: slice0000_rom0000<12> 12: pcnt<2> 25: rcnt<5> 38: xclk 13: pcnt<3> 26: rcnt<6> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs Mcompar_ypos_cmp_ge0000_N1 ...........XXXXXXXX..................... 8 cos<3> ....XX.X.XXXXXXXXXXXXXXXXXXXX........X.. 24 rcnt<5> ..X................XXXXXX...X........X.. 9 N_PZ_883 ..........XXXXXXXXX..................... 9 rcnt<6> ..X................XXXXXXX..X........X.. 10 sin<7> .X.....XXXXXXXXXXXXXXXXXX....XXX...X.X.. 24 sin<4> .X.....X.XXXXXXXXXXXXXXXXXXXX......X.X.. 24 sin<5> .X.....X.XXXXXXXXXXXXXXXXXXXXX.....X.X.. 25 sin<6> .X.....X.XXXXXXXXXXXXXXXXXXXXXX....X.X.. 26 sin<8> .X.....X.XXXXXXXXXXXXXXXXXXXXXXXX..X.X.. 28 sin<9> .X.....X.XXXXXXXXXXXXXXXXXXXXXXXXX.X.X.. 29 rcnt<7> ..X................XXXXXXXX.X........X.. 11 sin<1> X......X.XXXXXXXXXXXXXXXXXXXX.......XX.. 24 N_PZ_1144 ...XXXXX.XXXXXXXXXXXXXXXXXXXX........... 25 N_PZ_1143 ...XXXXX.XXXXXXXXXXXXXXXXXXXX........... 25 sin<10> .X.....X.XXXXXXXXXXXXXXXXXXXXXXXXXXX.X.. 30 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB3 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 32/24 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use pcnt<0> 2 FB3_1 136 I/O (b) + N_PZ_1175 1 FB3_2 135 I/O (b) pcnt<1> 3 FB3_3 134 I/O (b) + N_PZ_1237 2 FB3_4 (b) (b) rcnt<4> 3 FB3_5 133 I/O (b) + N_PZ_1182 2 FB3_6 (b) (b) sblu_not0001 2 FB3_7 (b) (b) sred<0> 3 FB3_8 (b) (b) + sgrn<0> 3 FB3_9 (b) (b) + N_PZ_1222 3 FB3_10 (b) (b) sred<1> 3 FB3_11 (b) (b) + sred<2> 3 FB3_12 (b) (b) + sred<3> 3 FB3_13 (b) (b) + N_PZ_768 2 FB3_14 132 I/O (b) sred<4> 3 FB3_15 (b) (b) + cos<2> 3 FB3_16 131 I/O (b) + Signals Used by Logic in Function Block 1: N_PZ_1029 14: pcnt<4> 27: rcnt<7> 2: N_PZ_1035 15: pcnt<5> 28: rcnt<8> 3: N_PZ_1222 16: pcnt<6> 29: rcnt<9> 4: N_PZ_761 17: pcnt<7> 30: sblu_cmp_ge0000 5: N_PZ_858 18: pcnt<8> 31: sgrn<0> 6: N_PZ_883 19: pcnt<9> 32: sgrn_cmp_le0000 7: cos_Maddsub__addsub0000_or0002_xor0000 20: rcnt<0> 33: sred<0> 8: mode<0> 21: rcnt<1> 34: sred<1> 9: pbtn.COMB 22: rcnt<2> 35: sred<2> 10: pcnt<0> 23: rcnt<3> 36: sred<3> 11: pcnt<1> 24: rcnt<4> 37: sred_cmp_le0000 12: pcnt<2> 25: rcnt<5> 38: xclk 13: pcnt<3> 26: rcnt<6> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs pcnt<0> .....X...X...........................X.. 3 N_PZ_1175 .........XXX............................ 3 pcnt<1> .....X...XX..........................X.. 4 N_PZ_1237 .X.X.....XXXXXXXXXXXXXXXXXXXXX.X....X... 25 rcnt<4> .....X.............XXXXX....X........X.. 8 N_PZ_1182 XX.X.....XXXXXXXXXXXXXXXXXXXXXXX....X... 27 sblu_not0001 XX.X.....XXXXXXXXXXXXXXXXXXXXX.X....X... 26 sred<0> XX.X.....XXXXXXXXXXXXXXXXXXXXX.X....XX.. 27 sgrn<0> XX.X.....XXXXXXXXXXXXXXXXXXXXX.X....XX.. 27 N_PZ_1222 XX.X.....XXXXXXXXXXXXXXXXXXXXX.XX...X... 27 sred<1> .XX......XXXXXXXXXXXXXXXXXXXXX.XX....X.. 26 sred<2> .XX......XXXXXXXXXXXXXXXXXXXXX.XXX...X.. 27 sred<3> .XX......XXXXXXXXXXXXXXXXXXXXX.XXXX..X.. 28 N_PZ_768 ......................XXXXXXX........... 7 sred<4> .XX......XXXXXXXXXXXXXXXXXXXXX.XXXXX.X.. 29 cos<2> ....X.XXXXXXXXXXXXXXXXXXX............X.. 21 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB4 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 37/3 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 56/0 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use (unused) 0 FB4_1 11 I/O xclk 0 FB4_2 12 I/O (b) N_PZ_1165 1 FB4_3 13 I/O (b) ymem<9> 4 FB4_4 14 I/O (b) + ymem<13> 7 FB4_5 15 I/O (b) + ymem<12> 8 FB4_6 16 I/O (b) + xmem<9> 4 FB4_7 (b) (b) + xmem<1> 4 FB4_8 (b) (b) + xmem<14> 7 FB4_9 (b) (b) + xmem<10> 4 FB4_10 (b) (b) + xmem<11> 6 FB4_11 (b) (b) + ymem<11> 7 FB4_12 17 I/O (b) + xmem<12> 7 FB4_13 (b) (b) + ymem<10> 4 FB4_14 18 I/O (b) + xmem<13> 6 FB4_15 (b) (b) + xmem<15> 10 FB4_16 (b) (b) + Signals Used by Logic in Function Block 1: Mcompar_ypos_cmp_ge0000_N1 14: pcnt<1> 26: xmem<11> 2: N_PZ_1087 15: pcnt<2> 27: xmem<12> 3: N_PZ_1088 16: pcnt<3> 28: xmem<13> 4: N_PZ_1151 17: pcnt<4> 29: xmem<14> 5: N_PZ_1165 18: pcnt<5> 30: xmem<15> 6: N_PZ_1200 19: pcnt<6> 31: xmem<1> 7: N_PZ_1281 20: pcnt<7> 32: xmem<9> 8: N_PZ_1289 21: pcnt<8> 33: ymem<10> 9: N_PZ_1290 22: pcnt<9> 34: ymem<11> 10: N_PZ_909 23: sin<10> 35: ymem<12> 11: cos<10> 24: xclk 36: ymem<13> 12: pbtn.COMB 25: xmem<10> 37: ymem<9> 13: pcnt<0> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs xclk ........................................ 0 N_PZ_1165 .X......................X............... 2 ymem<9> .......X...XXXXXXXXXXX.X............X... 14 ymem<13> ..XX......XXXXXXXXXXXX.X........XXXX.... 19 ymem<12> ..X.......XXXXXXXXXXXX.X........XXX..... 17 xmem<9> ......X....XXXXXXXXXXX.X.......X........ 14 xmem<1> ........X..XXXXXXXXXXX.X......X......... 14 xmem<14> X...XX...X.XXXXXXXX....X...XX........... 15 xmem<10> .X..X......XXXXXXXXXXX.XX............... 15 xmem<11> ....XX.....XXXXXXXXXXXXXXX.............. 17 ymem<11> ..X.......XXXXXXXXXXXX.X........XX...... 16 xmem<12> ....XX.....XXXXXXXXXXXXXXXX............. 18 ymem<10> ..X........XXXXXXXXXXX.X........X....... 14 xmem<13> ....XX...X.XXXXXXXXXXXXXXXXX............ 20 xmem<15> ....XX...X.XXXXXXXXXXXXXXXXXXX.......... 22 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB5 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 46/10 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use N_PZ_810 3 FB5_1 (b) (b) (unused) 0 FB5_2 33 I/O pcnt<5> 4 FB5_3 (b) (b) + xmem_Madd__add0000__or0003 3 FB5_4 32 GCK/I/O (b) sin_Maddsub__addsub0000__or0003 3 FB5_5 31 I/O (b) N_PZ_808 3 FB5_6 30 GCK/I/O (b) pcnt<6> 4 FB5_7 (b) (b) + pcnt<7> 4 FB5_8 (b) (b) + xmem<5> 4 FB5_9 (b) (b) + xmem<4> 4 FB5_10 (b) (b) + xmem<3> 4 FB5_11 (b) (b) + ymem<1> 7 FB5_12 (b) (b) + ymem<0> 3 FB5_13 (b) (b) + N_PZ_807 3 FB5_14 28 I/O (b) xmem<0> 3 FB5_15 (b) (b) + sin<3> 3 FB5_16 (b) (b) + Signals Used by Logic in Function Block 1: N_PZ_807 14: pcnt<5> 27: sin<4> 2: N_PZ_810 15: pcnt<6> 28: sin<5> 3: N_PZ_846 16: pcnt<7> 29: sin_Maddsub__addsub0000_or0003_xor0000 4: N_PZ_859 17: pcnt<8> 30: xclk 5: cos<0> 18: pcnt<9> 31: xmem<0> 6: cos<1> 19: rcnt<0> 32: xmem<3> 7: mode<0> 20: rcnt<1> 33: xmem<4> 8: pbtn.COMB 21: rcnt<2> 34: xmem<5> 9: pcnt<0> 22: rcnt<3> 35: xmem_Madd__add0000__or0001 10: pcnt<1> 23: rcnt<4> 36: xmem_Madd__add0000__or0003 11: pcnt<2> 24: rcnt<5> 37: ymem<0> 12: pcnt<3> 25: sin<0> 38: ymem<1> 13: pcnt<4> 26: sin<3> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs N_PZ_810 ....XX..............................XX.. 4 pcnt<5> ..X..........X..XX...........X.......... 5 xmem_Madd__add0000__or0003 X.........................X.....X....... 3 sin_Maddsub__addsub0000__or0003 ...X.....................X..X........... 3 N_PZ_808 ...........................X.....X.X.... 3 pcnt<6> ..X..........XX.XX...........X.......... 6 pcnt<7> ..X..........XXXXX...........X.......... 7 xmem<5> .......XXXXXXXXXXX.........X.X...X.X.... 15 xmem<4> X......XXXXXXXXXXX........X..X..X....... 15 xmem<3> .......XXXXXXXXXXX.......X...X.X..X..... 15 ymem<1> .X..XX.XXXXXXXXXXX...........X......XX.. 17 ymem<0> ....X..XXXXXXXXXXX...........X......X... 14 N_PZ_807 .........................X.....X..X..... 3 xmem<0> .......XXXXXXXXXXX......X....XX......... 14 sin<3> ...X..XXXXXXXXXXXXXXXXXX....XX.......... 21 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB6 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 42/14 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use N_PZ_846 1 FB6_1 34 I/O (b) ymem_Msub__sub0000__or0004 3 FB6_2 35 CDR/I/O (b) xmem<6> 4 FB6_3 (b) (b) + xmem_Madd__add0000__or0005 3 FB6_4 38 GCK/I/O GCK/I xmem<8> 4 FB6_5 (b) (b) + N_PZ_1281 4 FB6_6 (b) (b) N_PZ_1087 3 FB6_7 (b) (b) N_PZ_909 2 FB6_8 (b) (b) N_PZ_1200 1 FB6_9 (b) (b) mode<1> 2 FB6_10 (b) (b) mode<0> 1 FB6_11 (b) (b) N_PZ_811 3 FB6_12 39 DGE/I/O (b) N_PZ_809 3 FB6_13 40 I/O (b) ymem<4> 4 FB6_14 41 I/O (b) + ymem<3> 4 FB6_15 42 I/O (b) + xmem<7> 4 FB6_16 43 I/O (b) + Signals Used by Logic in Function Block 1: N_PZ_1087 14: pcnt<2> 27: xclk 2: N_PZ_1175 15: pcnt<3> 28: xmem<10> 3: N_PZ_1281 16: pcnt<4> 29: xmem<11> 4: N_PZ_808 17: pcnt<5> 30: xmem<12> 5: N_PZ_809 18: pcnt<6> 31: xmem<6> 6: N_PZ_811 19: pcnt<7> 32: xmem<7> 7: cos<3> 20: pcnt<8> 33: xmem<8> 8: cos<4> 21: pcnt<9> 34: xmem<9> 9: mode<0> 22: sin<10> 35: xmem_Madd__add0000__or0005 10: pbtn 23: sin<6> 36: ymem<3> 11: pbtn.COMB 24: sin<7> 37: ymem<4> 12: pcnt<0> 25: sin<8> 38: ymem_Msub__sub0000__or0002 13: pcnt<1> 26: sin<9> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs N_PZ_846 .X............XX........................ 3 ymem_Msub__sub0000__or0004 .....X.X............................X... 3 xmem<6> ...X......XXXXXXXXXXX.X...X...X......... 15 xmem_Madd__add0000__or0005 ...X..................X.......X......... 3 xmem<8> ....X.....XXXXXXXXXXX...X.X.....X....... 15 N_PZ_1281 ....X.....X.............XX......X....... 5 N_PZ_1087 ..X.......X..........X...X.......X...... 5 N_PZ_909 .....................X.....XXX.......... 4 N_PZ_1200 X....................X.................. 2 mode<1> ........XX.............................. 2 mode<0> .........X.............................. 1 N_PZ_811 ......X............................X.X.. 3 N_PZ_809 .......................X.......X..X..... 3 ymem<4> .....X.X..XXXXXXXXXXX.....X.........X... 15 ymem<3> ......X...XXXXXXXXXXX.....X........X.X.. 15 xmem<7> ..........XXXXXXXXXXX..X..X....X..X..... 15 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB7 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 51/5 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use N_PZ_1151 2 FB7_1 (b) (b) ymem<2> 4 FB7_2 (b) (b) + ymem<8> 4 FB7_3 (b) (b) + ymem<7> 4 FB7_4 (b) (b) + (unused) 0 FB7_5 26 I/O (unused) 0 FB7_6 25 I/O ymem<6> 4 FB7_7 (b) (b) + ymem<5> 4 FB7_8 (b) (b) + ymem<15> 10 FB7_9 (b) (b) + ymem<14> 9 FB7_10 (b) (b) + (unused) 0 FB7_11 24 I/O ymem_Msub__sub0000__or0006 3 FB7_12 23 I/O (b) ymem_Msub__sub0000__or0002 3 FB7_13 22 I/O (b) N_PZ_813 3 FB7_14 21 I/O (b) N_PZ_812 3 FB7_15 20 I/O (b) N_PZ_1289 4 FB7_16 19 I/O (b) Signals Used by Logic in Function Block 1: Mcompar_ypos_cmp_ge0000_N1 14: pbtn.COMB 27: ymem<11> 2: N_PZ_1088 15: pcnt<0> 28: ymem<12> 3: N_PZ_1151 16: pcnt<1> 29: ymem<13> 4: N_PZ_810 17: pcnt<2> 30: ymem<14> 5: N_PZ_812 18: pcnt<3> 31: ymem<15> 6: N_PZ_813 19: pcnt<4> 32: ymem<2> 7: cos<10> 20: pcnt<5> 33: ymem<5> 8: cos<2> 21: pcnt<6> 34: ymem<6> 9: cos<5> 22: pcnt<7> 35: ymem<7> 10: cos<6> 23: pcnt<8> 36: ymem<8> 11: cos<7> 24: pcnt<9> 37: ymem_Msub__sub0000__or0004 12: cos<8> 25: xclk 38: ymem_Msub__sub0000__or0006 13: cos<9> 26: ymem<10> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs N_PZ_1151 ......X..................XXX............ 4 ymem<2> X..X...X.....XXXXXXXX...X......X........ 13 ymem<8> .....X.....X.XXXXXXXXXXXX..........X.... 15 ymem<7> ..........X..XXXXXXXXXXXX.........X..X.. 15 ymem<6> ....X....X...XXXXXXXXXXXX........X...... 15 ymem<5> ........X....XXXXXXXXXXXX.......X...X... 15 ymem<15> XXX...X......XXXXXXXX...XXX.XXX......... 18 ymem<14> .XX...X......XXXXXXXXXXXXXXXXX.......... 20 ymem_Msub__sub0000__or0006 ....X....X.......................X...... 3 ymem_Msub__sub0000__or0002 ...X...X.......................X........ 3 N_PZ_813 ..........X.......................X..X.. 3 N_PZ_812 ........X.......................X...X... 3 N_PZ_1289 .....X.....XXX.....................X.... 5 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB8 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 21/19 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 28/28 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use blu<4> 1 FB8_1 44 I/O O blu<3> 1 FB8_2 45 I/O O blu<2> 1 FB8_3 46 I/O O sgrn<4> 3 FB8_4 (b) (b) + blu<1> 1 FB8_5 48 I/O O blu<0> 1 FB8_6 49 I/O O sgrn<5> 3 FB8_7 (b) (b) + sblu<2> 4 FB8_8 (b) (b) + sblu<3> 4 FB8_9 (b) (b) + sblu<4> 4 FB8_10 (b) (b) + grn<5> 1 FB8_11 50 I/O O grn<4> 1 FB8_12 51 I/O O grn<3> 1 FB8_13 52 I/O O sblu<1> 6 FB8_14 (b) (b) + sblu_cmp_ge0000 1 FB8_15 (b) (b) N_PZ_761 1 FB8_16 (b) (b) Signals Used by Logic in Function Block 1: N_PZ_1029 8: sblu<1> 15: sgrn<1> 2: N_PZ_1035 9: sblu<2> 16: sgrn<2> 3: N_PZ_1182 10: sblu<3> 17: sgrn<3> 4: N_PZ_1237 11: sblu<4> 18: sgrn<4> 5: N_PZ_761 12: sblu_cmp_ge0000 19: sgrn<5> 6: pix 13: sblu_not0001 20: sred_cmp_le0000 7: sblu<0> 14: sgrn<0> 21: xclk Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs blu<4> .....X....X............................. 2 blu<3> .....X...X.............................. 2 blu<2> .....X..X............................... 2 sgrn<4> XXXXX........XXXX...X................... 10 blu<1> .....X.X................................ 2 blu<0> .....XX................................. 2 sgrn<5> .XXXX........XXXXXX.X................... 11 sblu<2> X.....XX...XX......XX................... 7 sblu<3> X.....XXX..XX......XX................... 8 sblu<4> X.....XXXXX.X......XX................... 9 grn<5> .....X............X..................... 2 grn<4> .....X...........X...................... 2 grn<3> .....X..........X....................... 2 sblu<1> X.....XXXXX.X......XX................... 9 sblu_cmp_ge0000 ......XXXXX............................. 5 N_PZ_761 ......XXXXX............................. 5 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB9 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 36/4 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 50/6 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use xpos<2> 5 FB9_1 112 I/O (b) + N_PZ_850 3 FB9_2 113 I/O (b) N_PZ_1290 3 FB9_3 (b) (b) xpos<1> 5 FB9_4 114 I/O (b) + xmem_Madd__add0000__or0001 5 FB9_5 (b) (b) xpos<0> 4 FB9_6 115 I/O (b) + pcnt<3> 3 FB9_7 (b) (b) + pcnt<9> 3 FB9_8 (b) (b) + pcnt<8> 3 FB9_9 (b) (b) + pcnt<4> 3 FB9_10 (b) (b) + pcnt<2> 3 FB9_11 (b) (b) + N_PZ_1174 2 FB9_12 116 I/O (b) ypos<0> 4 FB9_13 117 I/O (b) + N_PZ_854 3 FB9_14 118 I/O (b) ypos<1> 5 FB9_15 119 I/O (b) + xmem<2> 8 FB9_16 (b) (b) + Signals Used by Logic in Function Block 1: Mcompar_ypos_cmp_ge0000_N1 13: pcnt<1> 25: xclk 2: N_PZ_1174 14: pcnt<2> 26: xmem<0> 3: N_PZ_1175 15: pcnt<3> 27: xmem<1> 4: N_PZ_1290 16: pcnt<4> 28: xmem<2> 5: N_PZ_846 17: pcnt<5> 29: xmem_Madd__add0000__or0001 6: N_PZ_850 18: pcnt<6> 30: xpos<0> 7: N_PZ_883 19: pcnt<7> 31: xpos<1> 8: cos<0> 20: pcnt<8> 32: xpos<2> 9: cos<1> 21: pcnt<9> 33: ymem<0> 10: cos<2> 22: sin<0> 34: ymem<1> 11: pbtn.COMB 23: sin<1> 35: ypos<0> 12: pcnt<0> 24: sin<2> 36: ypos<1> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs xpos<2> X....X...X..............X..X...X........ 6 N_PZ_850 .......XX....................XX......... 4 N_PZ_1290 .X........X..........XX..X.............. 5 xpos<1> X......XX...............X.X..XX......... 7 xmem_Madd__add0000__or0001 .X...................XXX.XXX............ 7 xpos<0> X......X................XX...X.......... 5 pcnt<3> ..X...X.......X.........X............... 4 pcnt<9> ....X.X.........XXXXX...X............... 8 pcnt<8> ....X.X.........XXX.....X............... 6 pcnt<4> ..X.X.X.......XX........X............... 6 pcnt<2> ..X...X....XXX..........X............... 6 N_PZ_1174 .....................XX..X.............. 3 ypos<0> X....................X..X.......X.X..... 5 N_PZ_854 .....................XX...........XX.... 4 ypos<1> X....................XX.X........XXX.... 7 xmem<2> XX.X......XXXXXXXX.....XX.XXX........... 16 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB10 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 12/28 Number of function block control terms used/remaining: 0/4 Number of PLA product terms used/remaining: 56/0 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use (unused) 0 FB10_1 111 I/O (unused) 0 FB10_2 110 I/O (unused) 0 FB10_3 107 I/O (unused) 0 FB10_4 106 I/O (unused) 0 FB10_5 105 I/O (unused) 0 FB10_6 104 I/O slice0000_rom0000<11> 6 FB10_7 (b) (b) cos_Maddsub__addsub0000_or0002_xor0000 8 FB10_8 (b) (b) sin_Maddsub__addsub0000_or0003_xor0000 6 FB10_9 (b) (b) slice0000_rom0000<13> 5 FB10_10 (b) (b) cos_Maddsub__addsub0000_or0003_xor0000 8 FB10_11 (b) (b) (unused) 0 FB10_12 103 I/O N_PZ_971 6 FB10_13 (b) (b) (unused) 0 FB10_14 102 I/O cos_Maddsub__addsub0000_or0001_xor0000 11 FB10_15 (b) (b) slice0000_rom0000<12> 6 FB10_16 101 I/O (b) Signals Used by Logic in Function Block 1: N_PZ_1136 5: ang<1> 9: ang<5> 2: N_PZ_1176 6: ang<2> 10: cos_Maddsub__addsub0000_or0009_xor0000 3: N_PZ_739 7: ang<3> 11: slice0000_rom0000<12> 4: ang<0> 8: ang<4> 12: slice0000_rom0000<13> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs slice0000_rom0000<11> X..XXXXX..X............................. 7 cos_Maddsub__addsub0000_or0002_xor0000 X..XXXXXX............................... 7 sin_Maddsub__addsub0000_or0003_xor0000 XXX.X.XXX.X............................. 8 slice0000_rom0000<13> XX.XXXXX..X............................. 8 cos_Maddsub__addsub0000_or0003_xor0000 XXXXXXX.XX.............................. 9 N_PZ_971 XX.XXXXX..XX............................ 9 cos_Maddsub__addsub0000_or0001_xor0000 XXXXXXXXXXXX............................ 12 slice0000_rom0000<12> ...XXXXX................................ 5 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB11 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 31/9 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 56/0 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use ypos<15> 5 FB11_1 (b) (b) + pix 18 FB11_2 (b) (b) + xpos<10> 5 FB11_3 (b) (b) + xpos<11> 5 FB11_4 (b) (b) + (unused) 0 FB11_5 120 I/O (unused) 0 FB11_6 121 I/O xpos<12> 5 FB11_7 (b) (b) + xpos<13> 5 FB11_8 (b) (b) + xpos<14> 5 FB11_9 (b) (b) + xpos<15> 5 FB11_10 (b) (b) + (unused) 0 FB11_11 124 I/O (unused) 0 FB11_12 125 I/O cos<4> 2 FB11_13 126 I/O (b) + sblu<0> 2 FB11_14 128 I/O (b) + ypos<13> 5 FB11_15 129 I/O (b) + ypos<14> 5 FB11_16 130 I/O (b) + Signals Used by Logic in Function Block 1: Mcompar_ypos_cmp_ge0000_N1 12: xmem<11> 22: xpos<15> 2: N_PZ_1080 13: xmem<12> 23: ymem<13> 3: N_PZ_1143 14: xmem<13> 24: ymem<14> 4: N_PZ_1144 15: xmem<14> 25: ymem<15> 5: N_PZ_1161 16: xmem<15> 26: ypos<10> 6: cos<10> 17: xpos<10> 27: ypos<11> 7: mode<1> 18: xpos<11> 28: ypos<12> 8: sblu_not0001 19: xpos<12> 29: ypos<13> 9: sin<10> 20: xpos<13> 30: ypos<14> 10: xclk 21: xpos<14> 31: ypos<15> 11: xmem<10> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs ypos<15> XX......XX..............XXXXXXX......... 11 pix ......X..X........XXXX.....XXXX......... 10 xpos<10> X...XX...XX.....X....................... 6 xpos<11> X...XX...X.X....XX...................... 7 xpos<12> X...XX...X..X...XXX..................... 8 xpos<13> X...XX...X...X..XXXX.................... 9 xpos<14> X...XX...X....X.XXXXX................... 10 xpos<15> X...XX...X.....XXXXXXX.................. 11 cos<4> ..XX.....X.............................. 3 sblu<0> .......X.X.............................. 2 ypos<13> XX......XX............X..XXXX........... 9 ypos<14> XX......XX.............X.XXXXX.......... 10 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB12 *********************************** This function block is part of I/O Bank number: 2 Number of function block inputs used/remaining: 25/15 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 50/6 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use xpos<5> 5 FB12_1 (b) (b) + xpos<3> 4 FB12_2 100 I/O (b) + xpos<6> 5 FB12_3 (b) (b) + N_PZ_902 3 FB12_4 (b) (b) N_PZ_840 3 FB12_5 (b) (b) cos<5> 3 FB12_6 (b) (b) + cos<6> 3 FB12_7 (b) (b) + cos<7> 3 FB12_8 (b) (b) + cos<8> 3 FB12_9 (b) (b) + cos<9> 3 FB12_10 (b) (b) + Madd_xpos_addsub0000__or0003 5 FB12_11 98 I/O (b) xpos<4> 7 FB12_12 97 I/O (b) + N_PZ_1161 3 FB12_13 96 I/O (b) xpos<9> 5 FB12_14 95 I/O (b) + N_PZ_852 3 FB12_15 94 I/O (b) cos<10> 3 FB12_16 (b) (b) + Signals Used by Logic in Function Block 1: Madd_xpos_addsub0000__or0003 10: cos<5> 18: xmem<5> 2: Madd_xpos_addsub0000__or0007 11: cos<6> 19: xmem<6> 3: Mcompar_ypos_cmp_ge0000_N1 12: cos<7> 20: xmem<9> 4: N_PZ_1143 13: cos<8> 21: xpos<3> 5: N_PZ_1144 14: cos<9> 22: xpos<4> 6: N_PZ_838 15: xclk 23: xpos<5> 7: N_PZ_852 16: xmem<3> 24: xpos<6> 8: N_PZ_900 17: xmem<4> 25: xpos<9> 9: cos<4> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs xpos<5> X.X......X....X..X....X................. 6 xpos<3> ..X..X.X......XX....X................... 6 xpos<6> ..X...X...X...X...X....X................ 6 N_PZ_902 ......X...XX...........X................ 4 N_PZ_840 ......X...XX...........X................ 4 cos<5> ...XX...X.....X......................... 4 cos<6> ...XX...XX....X......................... 5 cos<7> ...XX...XXX...X......................... 6 cos<8> ...XX...XXXX..X......................... 7 cos<9> ...XX...XXXXX.X......................... 8 Madd_xpos_addsub0000__or0003 .....X.XX...........XX.................. 5 xpos<4> ..X..X.XX.....X.X...XX.................. 8 N_PZ_1161 .XX..........X..........X............... 4 xpos<9> .XX..........XX....X....X............... 6 N_PZ_852 X........X............X................. 3 cos<10> ...XX...XXXXXXX......................... 9 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB13 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 36/4 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 43/13 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use ypos<5> 5 FB13_1 75 I/O (b) + N_PZ_903 3 FB13_2 76 I/O (b) N_PZ_842 3 FB13_3 77 I/O (b) rcnt<2> 3 FB13_4 (b) (b) + ypos<2> 5 FB13_5 78 I/O (b) + ypos<12> 5 FB13_6 79 I/O (b) + rcnt<1> 3 FB13_7 (b) (b) + rcnt<0> 3 FB13_8 (b) (b) + sgrn_cmp_le0000 1 FB13_9 (b) (b) N_PZ_1029 1 FB13_10 (b) (b) sgrn<1> 3 FB13_11 (b) (b) + ypos<11> 5 FB13_12 80 I/O (b) + ypos<10> 5 FB13_13 81 I/O (b) + rcnt<3> 3 FB13_14 82 I/O (b) + sgrn<2> 3 FB13_15 (b) (b) + sgrn<3> 3 FB13_16 (b) (b) + Signals Used by Logic in Function Block 1: Madd_ypos_addsub0000__or0003 13: rcnt<1> 25: sin<5> 2: Mcompar_ypos_cmp_ge0000_N1 14: rcnt<2> 26: xclk 3: N_PZ_1029 15: rcnt<3> 27: ymem<10> 4: N_PZ_1035 16: sgrn<0> 28: ymem<11> 5: N_PZ_1080 17: sgrn<1> 29: ymem<12> 6: N_PZ_1182 18: sgrn<2> 30: ymem<2> 7: N_PZ_1237 19: sgrn<3> 31: ymem<5> 8: N_PZ_761 20: sgrn<4> 32: ypos<10> 9: N_PZ_768 21: sgrn<5> 33: ypos<11> 10: N_PZ_854 22: sin<10> 34: ypos<12> 11: N_PZ_883 23: sin<2> 35: ypos<2> 12: rcnt<0> 24: sin<3> 36: ypos<5> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs ypos<5> XX......................XX....X....X.... 6 N_PZ_903 .........X............XX..........X..... 4 N_PZ_842 .........X............XX..........X..... 4 rcnt<2> ........X.XXXX...........X.............. 6 ypos<2> .X.......X............X..X...X....X..... 6 ypos<12> .X..X................X...X..X..XXX...... 8 rcnt<1> ........X.XXX............X.............. 5 rcnt<0> ........X.XX.............X.............. 4 sgrn_cmp_le0000 ...............XXXXXX................... 6 N_PZ_1029 ...............XXXXXX................... 6 sgrn<1> ..X..XX..................X.............. 4 ypos<11> .X..X................X...X.X...XX....... 7 ypos<10> .X..X................X...XX....X........ 6 rcnt<3> ........X.XXXXX..........X.............. 7 sgrn<2> ..XX.XXX.......XX........X.............. 8 sgrn<3> ..XX.XXX.......XXX.......X.............. 9 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB14 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 38/2 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 27/29 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use (unused) 0 FB14_1 74 I/O (unused) 0 FB14_2 71 I/O (unused) 0 FB14_3 70 I/O (unused) 0 FB14_4 69 I/O (unused) 0 FB14_5 (b) pclk 1 FB14_6 68 I/O O (unused) 0 FB14_7 (b) N_PZ_1217 2 FB14_8 (b) (b) Madd_xpos_addsub0000__or0007 5 FB14_9 (b) (b) xpos<8> 7 FB14_10 (b) (b) + xpos<7> 4 FB14_11 (b) (b) + sred_cmp_le0000 1 FB14_12 (b) (b) hsync 4 FB14_13 66 I/O O vsync 2 FB14_14 64 I/O O N_PZ_1035 1 FB14_15 (b) (b) red<0> 1 FB14_16 61 I/O O Signals Used by Logic in Function Block 1: Mcompar_ypos_cmp_ge0000_N1 14: pcnt<8> 27: sin<0> 2: N_PZ_840 15: pcnt<9> 28: slice0000_rom0000<11> 3: N_PZ_902 16: pix 29: sred<0> 4: ang<5> 17: rcnt<0> 30: sred<1> 5: cos<8> 18: rcnt<1> 31: sred<2> 6: iclk 19: rcnt<2> 32: sred<3> 7: pcnt<1> 20: rcnt<3> 33: sred<4> 8: pcnt<2> 21: rcnt<4> 34: xclk 9: pcnt<3> 22: rcnt<5> 35: xmem<7> 10: pcnt<4> 23: rcnt<6> 36: xmem<8> 11: pcnt<5> 24: rcnt<7> 37: xpos<7> 12: pcnt<6> 25: rcnt<8> 38: xpos<8> 13: pcnt<7> 26: rcnt<9> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs pclk .....X...........................X...... 2 N_PZ_1217 ...X......................XX............ 3 Madd_xpos_addsub0000__or0007 .XX.X...............................XX.. 5 xpos<8> XXX.X............................X.XXX.. 8 xpos<7> XXX..............................XX.X... 6 sred_cmp_le0000 ............................XXXXX....... 5 hsync ......XXXXXXXXX......................... 9 vsync ................XXXXXXXXXX.............. 10 N_PZ_1035 ............................XXXXX....... 5 red<0> ...............X............X........... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB15 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 37/3 Number of function block control terms used/remaining: 1/3 Number of PLA product terms used/remaining: 56/0 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use ypos<7> 4 FB15_1 (b) (b) + (unused) 0 FB15_2 83 I/O N_PZ_1080 3 FB15_3 (b) (b) ypos<9> 5 FB15_4 (b) (b) + N_PZ_905 3 FB15_5 (b) (b) N_PZ_844 3 FB15_6 (b) (b) ypos<6> 5 FB15_7 (b) (b) + ypos<3> 4 FB15_8 (b) (b) + Madd_ypos_addsub0000__or0003 5 FB15_9 (b) (b) ypos<4> 7 FB15_10 (b) (b) + N_PZ_1136 2 FB15_11 85 I/O (b) N_PZ_739 3 FB15_12 86 I/O (b) cos_Maddsub__addsub0000_or0009_xor0000 2 FB15_13 87 I/O (b) N_PZ_1088 3 FB15_14 88 I/O (b) Madd_ypos_addsub0000__or0007 5 FB15_15 91 I/O (b) ypos<8> 7 FB15_16 92 I/O (b) + Signals Used by Logic in Function Block 1: Madd_ypos_addsub0000__or0007 14: ang<3> 26: ymem<3> 2: Mcompar_ypos_cmp_ge0000_N1 15: ang<4> 27: ymem<4> 3: N_PZ_1176 16: ang<5> 28: ymem<6> 4: N_PZ_1289 17: cos<10> 29: ymem<7> 5: N_PZ_739 18: cos<9> 30: ymem<8> 6: N_PZ_842 19: pbtn.COMB 31: ymem<9> 7: N_PZ_844 20: sin<4> 32: ypos<3> 8: N_PZ_856 21: sin<6> 33: ypos<4> 9: N_PZ_903 22: sin<7> 34: ypos<6> 10: N_PZ_905 23: sin<8> 35: ypos<7> 11: ang<0> 24: sin<9> 36: ypos<8> 12: ang<1> 25: xclk 37: ypos<9> 13: ang<2> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs ypos<7> .X....X..X..............X...X.....X..... 6 N_PZ_1080 X......................X............X... 3 ypos<9> XX.....................XX.....X.....X... 6 N_PZ_905 .......X............XX...........X...... 4 N_PZ_844 .......X............XX...........X...... 4 ypos<6> .X.....X............X...X..X.....X...... 6 ypos<3> .X...X..X...............XX.....X........ 6 Madd_ypos_addsub0000__or0003 .....X..X..........X...........XX....... 5 ypos<4> .X...X..X..........X....X.X....XX....... 8 N_PZ_1136 ..........XXXX.......................... 4 N_PZ_739 ............XXXX........................ 4 cos_Maddsub__addsub0000_or0009_xor0000 ..X.X..........X........................ 3 N_PZ_1088 ...X............XXX...........X......... 5 Madd_ypos_addsub0000__or0007 ......X..X............X...........XX.... 5 ypos<8> .X....X..X............X.X....X....XX.... 8 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB16 *********************************** This function block is part of I/O Bank number: 1 Number of function block inputs used/remaining: 33/7 Number of function block control terms used/remaining: 0/4 Number of PLA product terms used/remaining: 35/21 Signal Total Loc Pin Pin Pin CTC CTR CTS CTE Name Pt No. Type Use (unused) 0 FB16_1 (b) N_PZ_858 5 FB16_2 (b) (b) sin_Maddsub__addsub0000__or0001 4 FB16_3 (b) (b) N_PZ_859 5 FB16_4 (b) (b) red<1> 1 FB16_5 60 I/O O red<2> 1 FB16_6 59 I/O O N_PZ_1176 2 FB16_7 (b) (b) N_PZ_900 3 FB16_8 (b) (b) N_PZ_838 3 FB16_9 (b) (b) cos_Maddsub__addsub0000__or0002 3 FB16_10 (b) (b) red<3> 1 FB16_11 58 I/O O red<4> 1 FB16_12 57 I/O O grn<0> 1 FB16_13 56 I/O O N_PZ_856 3 FB16_14 (b) (b) grn<1> 1 FB16_15 54 I/O O grn<2> 1 FB16_16 53 I/O O Signals Used by Logic in Function Block 1: Madd_ypos_addsub0000__or0003 12: cos<1> 23: sin<2> 2: N_PZ_1217 13: cos<2> 24: sin<5> 3: N_PZ_850 14: cos<3> 25: sin_Maddsub__addsub0000__or0001 4: N_PZ_858 15: cos_Maddsub__addsub0000_or0001_xor0000 26: slice0000_rom0000<12> 5: N_PZ_971 16: cos_Maddsub__addsub0000_or0002_xor0000 27: slice0000_rom0000<13> 6: ang<0> 17: pix 28: sred<1> 7: ang<1> 18: sgrn<0> 29: sred<2> 8: ang<2> 19: sgrn<1> 30: sred<3> 9: ang<3> 20: sgrn<2> 31: sred<4> 10: ang<5> 21: sin<0> 32: xpos<2> 11: cos<0> 22: sin<1> 33: ypos<5> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs N_PZ_858 ....X....XXX..X......................... 5 sin_Maddsub__addsub0000__or0001 .X.......X..........XX...X.............. 5 N_PZ_859 .........X............X.X.X............. 4 red<1> ................X..........X............ 2 red<2> ................X...........X........... 2 N_PZ_1176 .....XXXX............................... 4 N_PZ_900 ..X.........XX.................X........ 4 N_PZ_838 ..X.........XX.................X........ 4 cos_Maddsub__addsub0000__or0002 ...X........X..X........................ 3 red<3> ................X............X.......... 2 red<4> ................X.............X......... 2 grn<0> ................XX...................... 2 N_PZ_856 X......................X........X....... 3 grn<1> ................X.X..................... 2 grn<2> ................X..X.................... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 ******************************* Equations ******************************** ********** Mapped Logic ********** Madd_xpos_addsub0000__or0003 <= ((NOT cos(4) AND NOT xpos(4)) OR (NOT cos(4) AND N_PZ_900) OR (NOT xpos(4) AND N_PZ_900) OR (NOT cos(4) AND NOT N_PZ_838 AND NOT xpos(3)) OR (NOT xpos(4) AND NOT N_PZ_838 AND NOT xpos(3))); Madd_xpos_addsub0000__or0007 <= ((NOT cos(8) AND NOT xpos(8)) OR (NOT cos(8) AND N_PZ_902) OR (NOT xpos(8) AND N_PZ_902) OR (NOT cos(8) AND NOT N_PZ_840 AND NOT xpos(7)) OR (NOT xpos(8) AND NOT N_PZ_840 AND NOT xpos(7))); Madd_ypos_addsub0000__or0003 <= ((NOT sin(4) AND NOT ypos(4)) OR (NOT sin(4) AND N_PZ_903) OR (NOT ypos(4) AND N_PZ_903) OR (NOT sin(4) AND NOT N_PZ_842 AND NOT ypos(3)) OR (NOT ypos(4) AND NOT N_PZ_842 AND NOT ypos(3))); Madd_ypos_addsub0000__or0007 <= ((NOT sin(8) AND NOT ypos(8)) OR (NOT sin(8) AND N_PZ_905) OR (NOT ypos(8) AND N_PZ_905) OR (NOT sin(8) AND NOT N_PZ_844 AND NOT ypos(7)) OR (NOT ypos(8) AND NOT N_PZ_844 AND NOT ypos(7))); Mcompar_ypos_cmp_ge0000_N1 <= ((NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(9) AND NOT pcnt(7)) OR (NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7)) OR (NOT pcnt(2) AND NOT pcnt(3) AND NOT pcnt(8) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4))); N_PZ_1029 <= (sgrn(0) AND sgrn(1) AND sgrn(2) AND sgrn(3) AND sgrn(4) AND sgrn(5)); N_PZ_1035 <= (sred(0) AND sred(1) AND sred(2) AND sred(3) AND sred(4)); N_PZ_1080 <= ((sin(9) AND ypos(9)) OR (sin(9) AND NOT Madd_ypos_addsub0000__or0007) OR (ypos(9) AND NOT Madd_ypos_addsub0000__or0007)); N_PZ_1087 <= (pbtn.COMB AND sin(10)) XOR ((pbtn.COMB AND sin(9) AND NOT N_PZ_1281) OR (pbtn.COMB AND xmem(9) AND N_PZ_1281)); N_PZ_1088 <= (cos(10) AND pbtn.COMB) XOR ((pbtn.COMB AND cos(9) AND NOT N_PZ_1289) OR (pbtn.COMB AND NOT ymem(9) AND N_PZ_1289)); N_PZ_1136 <= ((ang(0) AND ang(3) AND NOT ang(2)) OR (ang(3) AND ang(2) AND NOT ang(1))); N_PZ_1143 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND cos(3) AND cos_Maddsub__addsub0000_or0003_xor0000 AND NOT cos_Maddsub__addsub0000_or0009_xor0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND cos(3) AND NOT cos_Maddsub__addsub0000_or0009_xor0000 AND NOT cos_Maddsub__addsub0000__or0002) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND cos_Maddsub__addsub0000_or0003_xor0000 AND NOT cos_Maddsub__addsub0000_or0009_xor0000 AND NOT cos_Maddsub__addsub0000__or0002)); N_PZ_1144 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT cos(3) AND NOT cos_Maddsub__addsub0000_or0003_xor0000 AND cos_Maddsub__addsub0000_or0009_xor0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT cos(3) AND cos_Maddsub__addsub0000_or0009_xor0000 AND cos_Maddsub__addsub0000__or0002) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT cos_Maddsub__addsub0000_or0003_xor0000 AND cos_Maddsub__addsub0000_or0009_xor0000 AND cos_Maddsub__addsub0000__or0002)); N_PZ_1151 <= ((NOT ymem(10) AND NOT cos(10) AND NOT ymem(12)) OR (cos(10) AND ymem(11) AND ymem(12))); N_PZ_1161 <= ((NOT cos(9) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT xpos(9)) OR (NOT cos(9) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND Madd_xpos_addsub0000__or0007) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT xpos(9) AND Madd_xpos_addsub0000__or0007)); N_PZ_1165 <= (xmem(10) AND N_PZ_1087); N_PZ_1174 <= ((sin(1)) OR (sin(0) AND xmem(0))); N_PZ_1175 <= (pcnt(2) AND pcnt(1) AND pcnt(0)); N_PZ_1176 <= ((NOT ang(3) AND NOT ang(2)) OR (NOT ang(0) AND NOT ang(3) AND NOT ang(1))); N_PZ_1182 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred_cmp_le0000 AND sgrn(0) AND NOT sgrn_cmp_le0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND N_PZ_761 AND NOT N_PZ_1029 AND sgrn(0) AND N_PZ_1035)); N_PZ_1200 <= (sin(10) AND N_PZ_1087); N_PZ_1217 <= ((ang(5) AND NOT sin(0) AND NOT slice0000_rom0000(11)) OR (NOT ang(5) AND sin(0) AND NOT slice0000_rom0000(11))); N_PZ_1222 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT sblu_cmp_ge0000 AND NOT sred_cmp_le0000 AND NOT sred(0) AND N_PZ_761 AND N_PZ_1029) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT sred_cmp_le0000 AND NOT sred(0) AND N_PZ_761 AND N_PZ_1029 AND NOT sgrn_cmp_le0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT sred_cmp_le0000 AND NOT sred(0) AND N_PZ_761 AND N_PZ_1029 AND N_PZ_1035)); N_PZ_1237 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred_cmp_le0000 AND NOT N_PZ_761 AND NOT sgrn_cmp_le0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred_cmp_le0000 AND NOT sgrn_cmp_le0000 AND NOT N_PZ_1035)); N_PZ_1281 <= (pbtn.COMB AND sin(9)) XOR ((pbtn.COMB AND sin(8) AND xmem(8)) OR (pbtn.COMB AND sin(8) AND NOT N_PZ_809) OR (pbtn.COMB AND xmem(8) AND NOT N_PZ_809)); N_PZ_1289 <= (pbtn.COMB AND cos(9)) XOR ((pbtn.COMB AND cos(8) AND NOT ymem(8)) OR (pbtn.COMB AND cos(8) AND N_PZ_813) OR (pbtn.COMB AND NOT ymem(8) AND N_PZ_813)); N_PZ_1290 <= ((NOT pbtn.COMB) OR (NOT N_PZ_1174) OR (sin(1) AND sin(0) AND xmem(0))); N_PZ_739 <= ang(5) XOR ((NOT ang(3) AND NOT ang(4)) OR (NOT ang(2) AND NOT ang(4))); N_PZ_761 <= (NOT sblu(0) AND NOT sblu(1) AND NOT sblu(2) AND NOT sblu(3) AND NOT sblu(4)); N_PZ_768 <= ((NOT rcnt(9)) OR (NOT rcnt(3) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8))); N_PZ_807 <= ((NOT sin(3) AND NOT xmem(3)) OR (NOT sin(3) AND NOT xmem_Madd__add0000__or0001) OR (NOT xmem(3) AND NOT xmem_Madd__add0000__or0001)); N_PZ_808 <= ((NOT sin(5) AND NOT xmem(5)) OR (NOT sin(5) AND xmem_Madd__add0000__or0003) OR (NOT xmem(5) AND xmem_Madd__add0000__or0003)); N_PZ_809 <= ((NOT sin(7) AND NOT xmem(7)) OR (NOT sin(7) AND xmem_Madd__add0000__or0005) OR (NOT xmem(7) AND xmem_Madd__add0000__or0005)); N_PZ_810 <= ((cos(1) AND NOT ymem(1)) OR (cos(1) AND cos(0) AND NOT ymem(0)) OR (cos(0) AND NOT ymem(1) AND NOT ymem(0))); N_PZ_811 <= ((cos(3) AND NOT ymem(3)) OR (cos(3) AND ymem_Msub__sub0000__or0002) OR (NOT ymem(3) AND ymem_Msub__sub0000__or0002)); N_PZ_812 <= ((cos(5) AND NOT ymem(5)) OR (cos(5) AND ymem_Msub__sub0000__or0004) OR (NOT ymem(5) AND ymem_Msub__sub0000__or0004)); N_PZ_813 <= ((cos(7) AND NOT ymem(7)) OR (cos(7) AND ymem_Msub__sub0000__or0006) OR (NOT ymem(7) AND ymem_Msub__sub0000__or0006)); N_PZ_838 <= ((cos(3) AND cos(2) AND xpos(2)) OR (cos(3) AND cos(2) AND N_PZ_850) OR (cos(3) AND xpos(2) AND N_PZ_850)); N_PZ_840 <= ((cos(6) AND cos(7) AND xpos(6)) OR (cos(6) AND cos(7) AND NOT N_PZ_852) OR (cos(7) AND xpos(6) AND NOT N_PZ_852)); N_PZ_842 <= ((sin(3) AND sin(2) AND ypos(2)) OR (sin(3) AND sin(2) AND N_PZ_854) OR (sin(3) AND ypos(2) AND N_PZ_854)); N_PZ_844 <= ((sin(6) AND sin(7) AND ypos(6)) OR (sin(6) AND sin(7) AND NOT N_PZ_856) OR (sin(7) AND ypos(6) AND NOT N_PZ_856)); N_PZ_846 <= (N_PZ_1175 AND pcnt(3) AND pcnt(4)); N_PZ_850 <= ((cos(1) AND xpos(1)) OR (cos(1) AND cos(0) AND xpos(0)) OR (cos(0) AND xpos(1) AND xpos(0))); N_PZ_852 <= ((NOT cos(5) AND NOT xpos(5)) OR (NOT cos(5) AND Madd_xpos_addsub0000__or0003) OR (NOT xpos(5) AND Madd_xpos_addsub0000__or0003)); N_PZ_854 <= ((sin(1) AND ypos(1)) OR (sin(1) AND sin(0) AND ypos(0)) OR (sin(0) AND ypos(1) AND ypos(0))); N_PZ_856 <= ((NOT sin(5) AND NOT ypos(5)) OR (NOT sin(5) AND Madd_ypos_addsub0000__or0003) OR (NOT ypos(5) AND Madd_ypos_addsub0000__or0003)); N_PZ_858 <= ((NOT cos(1) AND NOT cos_Maddsub__addsub0000_or0001_xor0000) OR (NOT ang(5) AND NOT cos(1) AND NOT N_PZ_971) OR (NOT ang(5) AND NOT N_PZ_971 AND NOT cos_Maddsub__addsub0000_or0001_xor0000) OR (NOT cos(1) AND NOT cos(0) AND N_PZ_971) OR (NOT cos(0) AND N_PZ_971 AND NOT cos_Maddsub__addsub0000_or0001_xor0000)); N_PZ_859 <= ((NOT sin(2) AND sin_Maddsub__addsub0000__or0001) OR (ang(5) AND NOT slice0000_rom0000(13) AND NOT sin(2)) OR (ang(5) AND NOT slice0000_rom0000(13) AND sin_Maddsub__addsub0000__or0001) OR (NOT ang(5) AND slice0000_rom0000(13) AND NOT sin(2)) OR (NOT ang(5) AND slice0000_rom0000(13) AND sin_Maddsub__addsub0000__or0001)); N_PZ_883 <= ((NOT pcnt(8)) OR (NOT pcnt(9)) OR (NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(7) AND NOT pcnt(4)) OR (NOT pcnt(2) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(7)) OR (NOT pcnt(1) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(7))); N_PZ_900 <= ((NOT cos(3) AND NOT cos(2) AND NOT xpos(2)) OR (NOT cos(3) AND NOT cos(2) AND NOT N_PZ_850) OR (NOT cos(3) AND NOT xpos(2) AND NOT N_PZ_850)); N_PZ_902 <= ((NOT cos(6) AND NOT cos(7) AND NOT xpos(6)) OR (NOT cos(6) AND NOT cos(7) AND N_PZ_852) OR (NOT cos(7) AND NOT xpos(6) AND N_PZ_852)); N_PZ_903 <= ((NOT sin(3) AND NOT sin(2) AND NOT ypos(2)) OR (NOT sin(3) AND NOT sin(2) AND NOT N_PZ_854) OR (NOT sin(3) AND NOT ypos(2) AND NOT N_PZ_854)); N_PZ_905 <= ((NOT sin(6) AND NOT sin(7) AND NOT ypos(6)) OR (NOT sin(6) AND NOT sin(7) AND N_PZ_856) OR (NOT sin(7) AND NOT ypos(6) AND N_PZ_856)); N_PZ_909 <= ((NOT sin(10) AND xmem(11) AND xmem(12)) OR (sin(10) AND NOT xmem(11) AND NOT xmem(10) AND NOT xmem(12))); N_PZ_971 <= ((ang(0) AND ang(3) AND ang(4)) OR (ang(0) AND NOT ang(1) AND NOT N_PZ_1136) OR (ang(2) AND NOT ang(4) AND slice0000_rom0000(12)) OR (NOT ang(2) AND ang(1) AND slice0000_rom0000(13)) OR (ang(4) AND N_PZ_1176 AND NOT slice0000_rom0000(12)) OR (NOT ang(2) AND NOT ang(1) AND NOT ang(4) AND N_PZ_1176)); FTCPE_ang0: FTCPE port map (ang(0),ang_T(0),xclk,'0','0','1'); ang_T(0) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND angf(0) AND angf(1) AND angf(2)); FTCPE_ang1: FTCPE port map (ang(1),ang_T(1),xclk,'0','0','1'); ang_T(1) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(0) AND angf(0) AND angf(1) AND angf(2)); FTCPE_ang2: FTCPE port map (ang(2),ang_T(2),xclk,'0','0','1'); ang_T(2) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(0) AND angf(0) AND angf(1) AND angf(2) AND ang(1)); FTCPE_ang3: FTCPE port map (ang(3),ang_T(3),xclk,'0','0','1'); ang_T(3) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(0) AND angf(0) AND angf(1) AND angf(2) AND ang(2) AND ang(1)); FTCPE_ang4: FTCPE port map (ang(4),ang_T(4),xclk,'0','0','1'); ang_T(4) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(0) AND angf(0) AND angf(1) AND angf(2) AND ang(3) AND ang(2) AND ang(1)); FTCPE_ang5: FTCPE port map (ang(5),ang_T(5),xclk,'0','0','1'); ang_T(5) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(0) AND angf(0) AND angf(1) AND angf(2) AND ang(3) AND ang(2) AND ang(1) AND ang(4)); FTCPE_angf0: FTCPE port map (angf(0),angf_T(0),xclk,'0','0','1'); angf_T(0) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0)); FTCPE_angf1: FTCPE port map (angf(1),angf_T(1),xclk,'0','0','1'); angf_T(1) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND angf(0)); FTCPE_angf2: FTCPE port map (angf(2),angf_T(2),xclk,'0','0','1'); angf_T(2) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND angf(0) AND angf(1)); blu(0) <= (sblu(0) AND pix); blu(1) <= (sblu(1) AND pix); blu(2) <= (sblu(2) AND pix); blu(3) <= (sblu(3) AND pix); blu(4) <= (sblu(4) AND pix); FTCPE_cos0: FTCPE port map (cos(0),cos_T(0),xclk,'0','0','1'); cos_T(0) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_971); FTCPE_cos1: FTCPE port map (cos(1),cos_T(1),xclk,'0','0','1'); cos_T(1) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(5) AND NOT N_PZ_971 AND NOT cos_Maddsub__addsub0000_or0001_xor0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT ang(5) AND NOT N_PZ_971 AND cos_Maddsub__addsub0000_or0001_xor0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND cos(0) AND N_PZ_971 AND NOT cos_Maddsub__addsub0000_or0001_xor0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT cos(0) AND N_PZ_971 AND cos_Maddsub__addsub0000_or0001_xor0000)); FTCPE_cos2: FTCPE port map (cos(2),cos_T(2),xclk,'0','0','1'); cos_T(2) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND cos_Maddsub__addsub0000_or0002_xor0000 AND NOT pbtn.COMB AND N_PZ_858) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND NOT cos_Maddsub__addsub0000_or0002_xor0000 AND NOT pbtn.COMB AND NOT N_PZ_858)); FTCPE_cos3: FTCPE port map (cos(3),cos_T(3),xclk,'0','0','1'); cos_T(3) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND cos_Maddsub__addsub0000_or0003_xor0000 AND cos_Maddsub__addsub0000__or0002) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT cos_Maddsub__addsub0000_or0003_xor0000 AND NOT cos_Maddsub__addsub0000__or0002)); FTCPE_cos4: FTCPE port map (cos(4),cos_T(4),xclk,'0','0','1'); cos_T(4) <= NOT ((NOT N_PZ_1143 AND NOT N_PZ_1144)); FTCPE_cos5: FTCPE port map (cos(5),cos_T(5),xclk,'0','0','1'); cos_T(5) <= ((cos(4) AND N_PZ_1143) OR (NOT cos(4) AND N_PZ_1144)); FTCPE_cos6: FTCPE port map (cos(6),cos_T(6),xclk,'0','0','1'); cos_T(6) <= ((cos(4) AND N_PZ_1143 AND cos(5)) OR (NOT cos(4) AND N_PZ_1144 AND NOT cos(5))); FTCPE_cos7: FTCPE port map (cos(7),cos_T(7),xclk,'0','0','1'); cos_T(7) <= ((cos(4) AND N_PZ_1143 AND cos(5) AND cos(6)) OR (NOT cos(4) AND N_PZ_1144 AND NOT cos(5) AND NOT cos(6))); FTCPE_cos8: FTCPE port map (cos(8),cos_T(8),xclk,'0','0','1'); cos_T(8) <= ((cos(4) AND N_PZ_1143 AND cos(5) AND cos(6) AND cos(7)) OR (NOT cos(4) AND N_PZ_1144 AND NOT cos(5) AND NOT cos(6) AND NOT cos(7))); FTCPE_cos9: FTCPE port map (cos(9),cos_T(9),xclk,'0','0','1'); cos_T(9) <= ((cos(4) AND N_PZ_1143 AND cos(5) AND cos(6) AND cos(7) AND cos(8)) OR (NOT cos(4) AND N_PZ_1144 AND NOT cos(5) AND NOT cos(6) AND NOT cos(7) AND NOT cos(8))); FTCPE_cos10: FTCPE port map (cos(10),cos_T(10),xclk,'0','0','1'); cos_T(10) <= ((cos(4) AND N_PZ_1143 AND cos(5) AND cos(6) AND cos(7) AND cos(8) AND cos(9)) OR (NOT cos(4) AND N_PZ_1144 AND NOT cos(5) AND NOT cos(6) AND NOT cos(7) AND NOT cos(8) AND NOT cos(9))); cos_Maddsub__addsub0000__or0002 <= ((NOT cos(2) AND NOT cos_Maddsub__addsub0000_or0002_xor0000) OR (NOT cos(2) AND N_PZ_858) OR (NOT cos_Maddsub__addsub0000_or0002_xor0000 AND N_PZ_858)); cos_Maddsub__addsub0000_or0001_xor0000 <= ((ang(0) AND ang(5) AND N_PZ_1176) OR (NOT ang(5) AND N_PZ_1136 AND NOT slice0000_rom0000(12)) OR (ang(0) AND ang(5) AND N_PZ_1136 AND slice0000_rom0000(12)) OR (NOT ang(0) AND NOT ang(2) AND N_PZ_1176 AND NOT cos_Maddsub__addsub0000_or0009_xor0000) OR (ang(3) AND ang(2) AND N_PZ_739 AND NOT N_PZ_1136) OR (ang(3) AND NOT ang(1) AND ang(5) AND NOT N_PZ_1136) OR (NOT ang(3) AND NOT ang(5) AND NOT N_PZ_739 AND NOT N_PZ_1176) OR (ang(2) AND ang(1) AND NOT ang(5) AND N_PZ_739) OR (NOT ang(2) AND ang(1) AND NOT N_PZ_739 AND NOT N_PZ_1176) OR (NOT ang(0) AND ang(2) AND NOT ang(1) AND ang(4) AND NOT N_PZ_739) OR (ang(2) AND NOT ang(1) AND ang(5) AND NOT ang(4) AND NOT slice0000_rom0000(13))); cos_Maddsub__addsub0000_or0002_xor0000 <= NOT (ang(5) XOR ((ang(0) AND NOT ang(2) AND NOT ang(1)) OR (NOT ang(3) AND NOT ang(2) AND NOT ang(1)) OR (ang(5) AND NOT ang(4) AND N_PZ_1136) OR (NOT ang(0) AND ang(3) AND NOT ang(2) AND ang(1)) OR (NOT ang(0) AND NOT ang(3) AND ang(2) AND NOT ang(4)) OR (ang(3) AND ang(2) AND NOT ang(1) AND NOT ang(5) AND NOT ang(4)) OR (ang(3) AND NOT ang(2) AND ang(1) AND NOT ang(5) AND NOT ang(4)))); cos_Maddsub__addsub0000_or0003_xor0000 <= ((ang(3) AND ang(2) AND N_PZ_739) OR (ang(1) AND ang(5) AND N_PZ_1136) OR (ang(0) AND NOT ang(3) AND ang(1) AND NOT N_PZ_739) OR (ang(0) AND NOT ang(3) AND NOT ang(1) AND NOT ang(5)) OR (NOT ang(0) AND NOT ang(3) AND ang(2) AND cos_Maddsub__addsub0000_or0009_xor0000) OR (NOT ang(0) AND NOT ang(2) AND ang(1) AND NOT N_PZ_739) OR (NOT ang(2) AND NOT ang(1) AND NOT ang(5) AND N_PZ_1176) OR (NOT ang(2) AND NOT ang(1) AND NOT N_PZ_739 AND NOT N_PZ_1176)); cos_Maddsub__addsub0000_or0009_xor0000 <= ((NOT ang(5) AND NOT N_PZ_1176) OR (NOT N_PZ_739 AND N_PZ_1176)); grn(0) <= (sgrn(0) AND pix); grn(1) <= (sgrn(1) AND pix); grn(2) <= (sgrn(2) AND pix); grn(3) <= (sgrn(3) AND pix); grn(4) <= (sgrn(4) AND pix); grn(5) <= (sgrn(5) AND pix); hsync <= ((NOT pcnt(8)) OR (NOT pcnt(9)) OR (NOT pcnt(2) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(7) AND NOT pcnt(4)) OR (NOT pcnt(1) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(7) AND NOT pcnt(4))); FTCPE_mode0: FTCPE port map (mode(0),'0',pbtn,'0','0','1'); FTCPE_mode1: FTCPE port map (mode(1),mode(0),pbtn,'0','0','1'); pbtn.COMB <= ((NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(9)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(6)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(7)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(8)) OR (rcnt(3) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(5)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(4) AND rcnt(5)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(5) AND rcnt(1)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND rcnt(5) AND rcnt(2)));FDCPE_pbtn: FDCPE port map (pbtn,btn,xclk,'0','0',pbtn_CE); pbtn_CE <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8)); pclk <= (xclk AND NOT iclk); FDCPE_pcnt0: FDCPE port map (pcnt(0),pcnt_D(0),xclk,'0','0','1'); pcnt_D(0) <= (N_PZ_883 AND NOT pcnt(0)); FDCPE_pcnt1: FDCPE port map (pcnt(1),pcnt_D(1),xclk,'0','0','1'); pcnt_D(1) <= ((N_PZ_883 AND pcnt(1) AND NOT pcnt(0)) OR (N_PZ_883 AND NOT pcnt(1) AND pcnt(0))); FDCPE_pcnt2: FDCPE port map (pcnt(2),pcnt_D(2),xclk,'0','0','1'); pcnt_D(2) <= ((N_PZ_883 AND pcnt(2) AND NOT N_PZ_1175) OR (N_PZ_883 AND NOT N_PZ_1175 AND pcnt(1) AND pcnt(0))); FDCPE_pcnt3: FDCPE port map (pcnt(3),pcnt_D(3),xclk,'0','0','1'); pcnt_D(3) <= ((N_PZ_883 AND N_PZ_1175 AND NOT pcnt(3)) OR (N_PZ_883 AND NOT N_PZ_1175 AND pcnt(3))); FDCPE_pcnt4: FDCPE port map (pcnt(4),pcnt_D(4),xclk,'0','0','1'); pcnt_D(4) <= ((N_PZ_883 AND NOT N_PZ_846 AND pcnt(4)) OR (N_PZ_883 AND N_PZ_1175 AND pcnt(3) AND NOT N_PZ_846)); FDCPE_pcnt5: FDCPE port map (pcnt(5),pcnt_D(5),xclk,'0','0','1'); pcnt_D(5) <= NOT (((pcnt(5) AND N_PZ_846) OR (NOT pcnt(5) AND NOT N_PZ_846) OR (pcnt(8) AND pcnt(9)))); FTCPE_pcnt6: FTCPE port map (pcnt(6),pcnt_T(6),xclk,'0','0','1'); pcnt_T(6) <= ((pcnt(5) AND NOT pcnt(8) AND N_PZ_846) OR (pcnt(5) AND NOT pcnt(9) AND N_PZ_846) OR (pcnt(8) AND pcnt(6) AND pcnt(9))); FTCPE_pcnt7: FTCPE port map (pcnt(7),pcnt_T(7),xclk,'0','0','1'); pcnt_T(7) <= ((pcnt(8) AND pcnt(9) AND pcnt(7)) OR (pcnt(5) AND NOT pcnt(8) AND pcnt(6) AND N_PZ_846) OR (pcnt(5) AND pcnt(6) AND NOT pcnt(9) AND N_PZ_846)); FTCPE_pcnt8: FTCPE port map (pcnt(8),pcnt_T(8),xclk,'0','0','1'); pcnt_T(8) <= ((NOT N_PZ_883) OR (pcnt(5) AND pcnt(6) AND pcnt(7) AND N_PZ_846)); FDCPE_pcnt9: FDCPE port map (pcnt(9),pcnt_D(9),xclk,'0','0','1'); pcnt_D(9) <= ((N_PZ_883 AND pcnt(9)) OR (N_PZ_883 AND pcnt(5) AND pcnt(8) AND pcnt(6) AND pcnt(7) AND N_PZ_846)); FDCPE_pix: FDCPE port map (pix,pix_D,xclk,'0','0','1'); pix_D <= (ypos(15) AND NOT xpos(15)) XOR ((NOT ypos(15) AND xpos(15) AND NOT mode(1)) OR (ypos(15) AND ypos(13) AND NOT xpos(15) AND mode(1)) OR (ypos(15) AND ypos(14) AND NOT xpos(15) AND mode(1)) OR (ypos(15) AND NOT xpos(15) AND NOT xpos(13) AND NOT xpos(12) AND NOT xpos(14) AND mode(1)) OR (NOT ypos(15) AND ypos(13) AND NOT xpos(13) AND NOT xpos(12) AND NOT xpos(14) AND mode(1)) OR (NOT ypos(15) AND ypos(14) AND NOT xpos(13) AND NOT xpos(12) AND NOT xpos(14) AND mode(1)) OR (NOT ypos(13) AND ypos(14) AND NOT xpos(15) AND NOT xpos(13) AND NOT xpos(12) AND mode(1)) OR (ypos(12) AND ypos(13) AND ypos(14) AND NOT xpos(15) AND NOT xpos(13) AND xpos(14) AND mode(1)) OR (ypos(12) AND ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND xpos(13) AND NOT xpos(12) AND mode(1)) OR (NOT ypos(12) AND ypos(13) AND ypos(14) AND NOT xpos(15) AND xpos(13) AND NOT xpos(12) AND mode(1)) OR (NOT ypos(12) AND NOT ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND xpos(13) AND NOT xpos(12) AND mode(1)) OR (NOT ypos(12) AND NOT ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND xpos(13) AND NOT xpos(14) AND mode(1)) OR (NOT ypos(12) AND NOT ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND NOT xpos(13) AND xpos(14) AND mode(1)) OR (ypos(12) AND ypos(13) AND ypos(14) AND NOT xpos(15) AND xpos(13) AND xpos(12) AND NOT xpos(14) AND mode(1)) OR (ypos(12) AND NOT ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND xpos(13) AND xpos(12) AND xpos(14) AND mode(1)) OR (ypos(12) AND NOT ypos(13) AND NOT ypos(14) AND NOT xpos(15) AND NOT xpos(13) AND xpos(12) AND NOT xpos(14) AND mode(1))); FDCPE_rcnt0: FDCPE port map (rcnt(0),rcnt_D(0),xclk,'0','0','1'); rcnt_D(0) <= ((rcnt(0) AND N_PZ_883) OR (NOT rcnt(0) AND NOT N_PZ_883 AND N_PZ_768)); FTCPE_rcnt1: FTCPE port map (rcnt(1),rcnt_T(1),xclk,'0','0','1'); rcnt_T(1) <= ((rcnt(0) AND NOT N_PZ_883 AND N_PZ_768) OR (NOT N_PZ_883 AND NOT N_PZ_768 AND rcnt(1))); FTCPE_rcnt2: FTCPE port map (rcnt(2),rcnt_T(2),xclk,'0','0','1'); rcnt_T(2) <= ((NOT N_PZ_883 AND NOT N_PZ_768 AND rcnt(2)) OR (rcnt(0) AND NOT N_PZ_883 AND N_PZ_768 AND rcnt(1))); FTCPE_rcnt3: FTCPE port map (rcnt(3),rcnt_T(3),xclk,'0','0','1'); rcnt_T(3) <= ((rcnt(3) AND NOT N_PZ_883 AND NOT N_PZ_768) OR (rcnt(0) AND NOT N_PZ_883 AND N_PZ_768 AND rcnt(1) AND rcnt(2))); FTCPE_rcnt4: FTCPE port map (rcnt(4),rcnt_T(4),xclk,'0','0','1'); rcnt_T(4) <= ((NOT N_PZ_883 AND rcnt(4) AND rcnt(9)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND NOT rcnt(9) AND rcnt(1) AND rcnt(2))); FTCPE_rcnt5: FTCPE port map (rcnt(5),rcnt_T(5),xclk,'0','0','1'); rcnt_T(5) <= ((NOT N_PZ_883 AND rcnt(9) AND rcnt(5)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND rcnt(4) AND NOT rcnt(9) AND rcnt(1) AND rcnt(2))); FTCPE_rcnt6: FTCPE port map (rcnt(6),rcnt_T(6),xclk,'0','0','1'); rcnt_T(6) <= ((NOT N_PZ_883 AND rcnt(9) AND rcnt(6)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND rcnt(4) AND NOT rcnt(9) AND rcnt(5) AND rcnt(1) AND rcnt(2))); FTCPE_rcnt7: FTCPE port map (rcnt(7),rcnt_T(7),xclk,'0','0','1'); rcnt_T(7) <= ((NOT N_PZ_883 AND rcnt(9) AND rcnt(7)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND rcnt(4) AND NOT rcnt(9) AND rcnt(5) AND rcnt(1) AND rcnt(2) AND rcnt(6))); FTCPE_rcnt8: FTCPE port map (rcnt(8),rcnt_T(8),xclk,'0','0','1'); rcnt_T(8) <= ((NOT N_PZ_883 AND rcnt(9) AND rcnt(8)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND rcnt(4) AND NOT rcnt(9) AND rcnt(5) AND rcnt(1) AND rcnt(2) AND rcnt(6) AND rcnt(7))); FDCPE_rcnt9: FDCPE port map (rcnt(9),rcnt_D(9),xclk,'0','0','1'); rcnt_D(9) <= ((N_PZ_883 AND rcnt(9)) OR (NOT rcnt(3) AND NOT rcnt(4) AND rcnt(9) AND NOT rcnt(5) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8)) OR (rcnt(3) AND rcnt(0) AND NOT N_PZ_883 AND rcnt(4) AND NOT rcnt(9) AND rcnt(5) AND rcnt(1) AND rcnt(2) AND rcnt(6) AND rcnt(7) AND rcnt(8))); red(0) <= (sred(0) AND pix); red(1) <= (sred(1) AND pix); red(2) <= (sred(2) AND pix); red(3) <= (sred(3) AND pix); red(4) <= (sred(4) AND pix); FTCPE_sblu0: FTCPE port map (sblu(0),sblu_not0001,xclk,'0','0','1'); FTCPE_sblu1: FTCPE port map (sblu(1),sblu_T(1),xclk,'0','0','1'); sblu_T(1) <= NOT (((NOT sblu_not0001) OR (sblu(0) AND NOT sred_cmp_le0000) OR (sblu(0) AND NOT N_PZ_1029) OR (NOT sblu(0) AND sred_cmp_le0000 AND N_PZ_1029) OR (sblu(0) AND sblu(1) AND sblu(2) AND sblu(3) AND sblu(4)))); FTCPE_sblu2: FTCPE port map (sblu(2),sblu_T(2),xclk,'0','0','1'); sblu_T(2) <= ((NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT sred_cmp_le0000) OR (NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT N_PZ_1029) OR (sblu(0) AND sblu_not0001 AND NOT sblu_cmp_ge0000 AND sblu(1) AND sred_cmp_le0000 AND N_PZ_1029)); FTCPE_sblu3: FTCPE port map (sblu(3),sblu_T(3),xclk,'0','0','1'); sblu_T(3) <= ((NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT sblu(2) AND NOT sred_cmp_le0000) OR (NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT sblu(2) AND NOT N_PZ_1029) OR (sblu(0) AND sblu_not0001 AND NOT sblu_cmp_ge0000 AND sblu(1) AND sblu(2) AND sred_cmp_le0000 AND N_PZ_1029)); FTCPE_sblu4: FTCPE port map (sblu(4),sblu_T(4),xclk,'0','0','1'); sblu_T(4) <= ((NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT sblu(2) AND NOT sred_cmp_le0000 AND NOT sblu(3)) OR (NOT sblu(0) AND sblu_not0001 AND NOT sblu(1) AND NOT sblu(2) AND NOT sblu(3) AND NOT N_PZ_1029) OR (sblu(0) AND sblu_not0001 AND sblu(1) AND sblu(2) AND sred_cmp_le0000 AND sblu(3) AND N_PZ_1029 AND NOT sblu(4))); sblu_cmp_ge0000 <= (sblu(0) AND sblu(1) AND sblu(2) AND sblu(3) AND sblu(4)); sblu_not0001 <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT sblu_cmp_ge0000 AND sred_cmp_le0000 AND N_PZ_1029) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT N_PZ_761 AND sgrn_cmp_le0000 AND N_PZ_1035)); FTCPE_sgrn0: FTCPE port map (sgrn(0),sgrn_T(0),xclk,'0','0','1'); sgrn_T(0) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred_cmp_le0000 AND NOT sgrn_cmp_le0000) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND N_PZ_761 AND NOT N_PZ_1029 AND N_PZ_1035)); FTCPE_sgrn1: FTCPE port map (sgrn(1),sgrn_T(1),xclk,'0','0','1'); sgrn_T(1) <= ((NOT N_PZ_1029 AND N_PZ_1182 AND NOT N_PZ_1237) OR (NOT N_PZ_1029 AND NOT N_PZ_1182 AND N_PZ_1237)); FTCPE_sgrn2: FTCPE port map (sgrn(2),sgrn_T(2),xclk,'0','0','1'); sgrn_T(2) <= ((NOT sgrn(0) AND NOT sgrn(1) AND N_PZ_1237) OR (N_PZ_761 AND NOT N_PZ_1029 AND sgrn(1) AND N_PZ_1182 AND N_PZ_1035)); FTCPE_sgrn3: FTCPE port map (sgrn(3),sgrn_T(3),xclk,'0','0','1'); sgrn_T(3) <= ((NOT sgrn(0) AND NOT sgrn(1) AND N_PZ_1237 AND NOT sgrn(2)) OR (N_PZ_761 AND NOT N_PZ_1029 AND sgrn(1) AND N_PZ_1182 AND N_PZ_1035 AND sgrn(2))); FTCPE_sgrn4: FTCPE port map (sgrn(4),sgrn_T(4),xclk,'0','0','1'); sgrn_T(4) <= ((NOT sgrn(0) AND NOT sgrn(1) AND N_PZ_1237 AND NOT sgrn(2) AND NOT sgrn(3)) OR (N_PZ_761 AND NOT N_PZ_1029 AND sgrn(1) AND N_PZ_1182 AND N_PZ_1035 AND sgrn(2) AND sgrn(3))); FTCPE_sgrn5: FTCPE port map (sgrn(5),sgrn_T(5),xclk,'0','0','1'); sgrn_T(5) <= ((NOT sgrn(0) AND NOT sgrn(1) AND N_PZ_1237 AND NOT sgrn(2) AND NOT sgrn(3) AND NOT sgrn(4)) OR (N_PZ_761 AND sgrn(1) AND N_PZ_1182 AND N_PZ_1035 AND sgrn(2) AND sgrn(3) AND sgrn(4) AND NOT sgrn(5))); sgrn_cmp_le0000 <= (NOT sgrn(0) AND NOT sgrn(1) AND NOT sgrn(2) AND NOT sgrn(3) AND NOT sgrn(4) AND NOT sgrn(5)); FTCPE_sin0: FTCPE port map (sin(0),sin_T(0),xclk,'0','0','1'); sin_T(0) <= (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT slice0000_rom0000(11)); FTCPE_sin1: FTCPE port map (sin(1),sin_T(1),xclk,'0','0','1'); sin_T(1) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND slice0000_rom0000(12) AND N_PZ_1217) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT slice0000_rom0000(12) AND NOT N_PZ_1217)); FTCPE_sin2: FTCPE port map (sin(2),sin_T(2),xclk,'0','0','1'); sin_T(2) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(5) AND slice0000_rom0000(13) AND sin_Maddsub__addsub0000__or0001) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND ang(5) AND NOT slice0000_rom0000(13) AND NOT sin_Maddsub__addsub0000__or0001) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT ang(5) AND slice0000_rom0000(13) AND NOT sin_Maddsub__addsub0000__or0001) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT ang(5) AND NOT slice0000_rom0000(13) AND sin_Maddsub__addsub0000__or0001)); FTCPE_sin3: FTCPE port map (sin(3),sin_T(3),xclk,'0','0','1'); sin_T(3) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND NOT pbtn.COMB AND sin_Maddsub__addsub0000_or0003_xor0000 AND N_PZ_859) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND NOT pbtn.COMB AND NOT sin_Maddsub__addsub0000_or0003_xor0000 AND NOT N_PZ_859)); FTCPE_sin4: FTCPE port map (sin(4),sin_T(4),xclk,'0','0','1'); sin_T(4) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND NOT sin_Maddsub__addsub0000__or0003) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND sin_Maddsub__addsub0000__or0003)); FTCPE_sin5: FTCPE port map (sin(5),sin_T(5),xclk,'0','0','1'); sin_T(5) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003)); FTCPE_sin6: FTCPE port map (sin(6),sin_T(6),xclk,'0','0','1'); sin_T(6) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003 AND sin(5)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003 AND NOT sin(5))); FTCPE_sin7: FTCPE port map (sin(7),sin_T(7),xclk,'0','0','1'); sin_T(7) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND N_PZ_739 AND NOT pbtn.COMB AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003 AND sin(5) AND sin(6)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT mode(0) AND NOT N_PZ_739 AND NOT pbtn.COMB AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003 AND NOT sin(5) AND NOT sin(6))); FTCPE_sin8: FTCPE port map (sin(8),sin_T(8),xclk,'0','0','1'); sin_T(8) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003 AND sin(5) AND sin(6) AND sin(7)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003 AND NOT sin(5) AND NOT sin(6) AND NOT sin(7))); FTCPE_sin9: FTCPE port map (sin(9),sin_T(9),xclk,'0','0','1'); sin_T(9) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003 AND sin(5) AND sin(6) AND sin(7) AND sin(8)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003 AND NOT sin(5) AND NOT sin(6) AND NOT sin(7) AND NOT sin(8))); FTCPE_sin10: FTCPE port map (sin(10),sin_T(10),xclk,'0','0','1'); sin_T(10) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND N_PZ_739 AND sin(4) AND NOT sin_Maddsub__addsub0000__or0003 AND sin(5) AND sin(6) AND sin(7) AND sin(8) AND sin(9)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT mode(0) AND NOT N_PZ_739 AND NOT sin(4) AND sin_Maddsub__addsub0000__or0003 AND NOT sin(5) AND NOT sin(6) AND NOT sin(7) AND NOT sin(8) AND NOT sin(9))); sin_Maddsub__addsub0000__or0001 <= ((NOT ang(5) AND slice0000_rom0000(12) AND NOT N_PZ_1217) OR (slice0000_rom0000(12) AND NOT sin(1) AND N_PZ_1217) OR (NOT slice0000_rom0000(12) AND NOT sin(1) AND NOT N_PZ_1217) OR (NOT slice0000_rom0000(12) AND N_PZ_1217 AND NOT sin(0))); sin_Maddsub__addsub0000__or0003 <= ((NOT sin(3) AND NOT sin_Maddsub__addsub0000_or0003_xor0000) OR (NOT sin(3) AND N_PZ_859) OR (NOT sin_Maddsub__addsub0000_or0003_xor0000 AND N_PZ_859)); sin_Maddsub__addsub0000_or0003_xor0000 <= ((N_PZ_739 AND N_PZ_1176) OR (NOT N_PZ_739 AND N_PZ_1136) OR (ang(3) AND ang(4) AND NOT N_PZ_739) OR (NOT ang(3) AND NOT ang(5) AND NOT N_PZ_1176) OR (ang(3) AND ang(1) AND ang(5) AND NOT ang(4)) OR (ang(3) AND NOT ang(1) AND NOT ang(5) AND slice0000_rom0000(12))); slice0000_rom0000(11) <= ((NOT ang(4) AND N_PZ_1136) OR (ang(0) AND NOT ang(3) AND ang(4)) OR (ang(0) AND NOT ang(3) AND slice0000_rom0000(12)) OR (ang(0) AND ang(2) AND ang(4)) OR (ang(3) AND NOT ang(1) AND NOT slice0000_rom0000(12)) OR (NOT ang(0) AND NOT ang(3) AND ang(1) AND NOT ang(4))); slice0000_rom0000(12) <= ((ang(0) AND ang(2) AND ang(1)) OR (ang(3) AND ang(2) AND ang(4)) OR (ang(0) AND ang(3) AND ang(1) AND NOT ang(4)) OR (ang(0) AND NOT ang(3) AND NOT ang(2) AND NOT ang(1)) OR (NOT ang(0) AND ang(3) AND NOT ang(1) AND NOT ang(4)) OR (NOT ang(0) AND NOT ang(3) AND NOT ang(2) AND ang(4))); slice0000_rom0000(13) <= ((ang(2) AND N_PZ_1136 AND NOT slice0000_rom0000(12)) OR (NOT ang(0) AND NOT ang(2) AND NOT ang(1) AND NOT ang(4)) OR (ang(3) AND ang(2) AND ang(4) AND NOT N_PZ_1136) OR (NOT ang(3) AND ang(4) AND NOT N_PZ_1176 AND NOT slice0000_rom0000(12)) OR (NOT ang(2) AND ang(1) AND NOT ang(4) AND NOT N_PZ_1176)); FTCPE_sred0: FTCPE port map (sred(0),sred_T(0),xclk,'0','0','1'); sred_T(0) <= ((NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sgrn_cmp_le0000 AND NOT N_PZ_1035) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND NOT sred_cmp_le0000 AND N_PZ_761 AND N_PZ_1029)); FTCPE_sred1: FTCPE port map (sred(1),sred_T(1),xclk,'0','0','1'); sred_T(1) <= ((N_PZ_1222) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred(0) AND sgrn_cmp_le0000 AND NOT N_PZ_1035)); FTCPE_sred2: FTCPE port map (sred(2),sred_T(2),xclk,'0','0','1'); sred_T(2) <= ((NOT sred(1) AND N_PZ_1222) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred(0) AND sgrn_cmp_le0000 AND NOT N_PZ_1035 AND sred(1))); FTCPE_sred3: FTCPE port map (sred(3),sred_T(3),xclk,'0','0','1'); sred_T(3) <= ((NOT sred(1) AND N_PZ_1222 AND NOT sred(2)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred(0) AND sgrn_cmp_le0000 AND NOT N_PZ_1035 AND sred(1) AND sred(2))); FTCPE_sred4: FTCPE port map (sred(4),sred_T(4),xclk,'0','0','1'); sred_T(4) <= ((NOT sred(1) AND N_PZ_1222 AND NOT sred(2) AND NOT sred(3)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8) AND sblu_cmp_ge0000 AND sred(0) AND sgrn_cmp_le0000 AND NOT N_PZ_1035 AND sred(1) AND sred(2) AND sred(3))); sred_cmp_le0000 <= (NOT sred(0) AND NOT sred(1) AND NOT sred(2) AND NOT sred(3) AND NOT sred(4)); vsync <= NOT (((NOT rcnt(4) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8)) OR (NOT rcnt(3) AND NOT rcnt(0) AND NOT rcnt(9) AND NOT rcnt(5) AND NOT rcnt(1) AND NOT rcnt(2) AND NOT rcnt(6) AND NOT rcnt(7) AND NOT rcnt(8)))); FTCPE_xclk: FTCPE port map (xclk,'0',NOT iclk,'0','0','1'); FTCPE_xmem0: FTCPE port map (xmem(0),xmem_T(0),xclk,'0','0','1'); xmem_T(0) <= ((pbtn.COMB AND sin(0)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(0))); FDCPE_xmem1: FDCPE port map (xmem(1),xmem_D(1),xclk,'0','0','1'); xmem_D(1) <= NOT (((xmem(1) AND NOT N_PZ_1290) OR (NOT xmem(1) AND N_PZ_1290) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FTCPE_xmem2: FTCPE port map (xmem(2),xmem_T(2),xclk,'0','0','1'); xmem_T(2) <= ((pbtn.COMB AND sin(2) AND NOT xmem_Madd__add0000__or0001 AND NOT xmem(2)) OR (pbtn.COMB AND sin(2) AND xmem(2) AND NOT N_PZ_1174) OR (pbtn.COMB AND NOT sin(2) AND xmem_Madd__add0000__or0001 AND xmem(2)) OR (pbtn.COMB AND sin(2) AND xmem(2) AND NOT xmem(1) AND NOT N_PZ_1290) OR (pbtn.COMB AND NOT sin(2) AND NOT xmem(2) AND xmem(1) AND N_PZ_1174) OR (pbtn.COMB AND NOT sin(2) AND NOT xmem(2) AND N_PZ_1290 AND N_PZ_1174) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(4) AND NOT pbtn.COMB AND Mcompar_ypos_cmp_ge0000_N1 AND xmem(2))); FTCPE_xmem3: FTCPE port map (xmem(3),xmem_T(3),xclk,'0','0','1'); xmem_T(3) <= ((pbtn.COMB AND sin(3) AND NOT xmem_Madd__add0000__or0001) OR (pbtn.COMB AND NOT sin(3) AND xmem_Madd__add0000__or0001) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(3))); FTCPE_xmem4: FTCPE port map (xmem(4),xmem_T(4),xclk,'0','0','1'); xmem_T(4) <= ((pbtn.COMB AND sin(4) AND N_PZ_807) OR (pbtn.COMB AND NOT sin(4) AND NOT N_PZ_807) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(4))); FTCPE_xmem5: FTCPE port map (xmem(5),xmem_T(5),xclk,'0','0','1'); xmem_T(5) <= ((pbtn.COMB AND sin(5) AND xmem_Madd__add0000__or0003) OR (pbtn.COMB AND NOT sin(5) AND NOT xmem_Madd__add0000__or0003) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(5))); FTCPE_xmem6: FTCPE port map (xmem(6),xmem_T(6),xclk,'0','0','1'); xmem_T(6) <= ((pbtn.COMB AND sin(6) AND N_PZ_808) OR (pbtn.COMB AND NOT sin(6) AND NOT N_PZ_808) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(6))); FTCPE_xmem7: FTCPE port map (xmem(7),xmem_T(7),xclk,'0','0','1'); xmem_T(7) <= ((pbtn.COMB AND sin(7) AND xmem_Madd__add0000__or0005) OR (pbtn.COMB AND NOT sin(7) AND NOT xmem_Madd__add0000__or0005) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(7))); FTCPE_xmem8: FTCPE port map (xmem(8),xmem_T(8),xclk,'0','0','1'); xmem_T(8) <= ((pbtn.COMB AND sin(8) AND N_PZ_809) OR (pbtn.COMB AND NOT sin(8) AND NOT N_PZ_809) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND xmem(8))); FDCPE_xmem9: FDCPE port map (xmem(9),xmem_D(9),xclk,'0','0','1'); xmem_D(9) <= NOT (((xmem(9) AND N_PZ_1281) OR (NOT xmem(9) AND NOT N_PZ_1281) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_xmem10: FDCPE port map (xmem(10),xmem_D(10),xclk,'0','0','1'); xmem_D(10) <= NOT (((N_PZ_1165) OR (NOT xmem(10) AND NOT N_PZ_1087) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_xmem11: FDCPE port map (xmem(11),xmem_D(11),xclk,'0','0','1'); xmem_D(11) <= NOT (((sin(10) AND NOT xmem(11) AND xmem(10)) OR (NOT sin(10) AND xmem(11) AND N_PZ_1165) OR (xmem(11) AND NOT xmem(10) AND N_PZ_1200) OR (NOT xmem(11) AND NOT N_PZ_1165 AND NOT N_PZ_1200) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_xmem12: FDCPE port map (xmem(12),xmem_D(12),xclk,'0','0','1'); xmem_D(12) <= NOT (((sin(10) AND xmem(11) AND NOT xmem(12)) OR (NOT xmem(11) AND xmem(10) AND NOT xmem(12)) OR (NOT N_PZ_1165 AND NOT N_PZ_1200 AND NOT xmem(12)) OR (NOT sin(10) AND xmem(11) AND N_PZ_1165 AND xmem(12)) OR (NOT xmem(11) AND NOT xmem(10) AND N_PZ_1200 AND xmem(12)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_xmem13: FDCPE port map (xmem(13),xmem_D(13),xclk,'0','0','1'); xmem_D(13) <= NOT (((NOT xmem(13) AND NOT N_PZ_909) OR (NOT N_PZ_1165 AND NOT N_PZ_1200 AND NOT xmem(13)) OR (NOT sin(10) AND xmem(11) AND N_PZ_1165 AND xmem(13) AND xmem(12)) OR (NOT xmem(11) AND NOT xmem(10) AND N_PZ_1200 AND xmem(13) AND NOT xmem(12)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_xmem14: FDCPE port map (xmem(14),xmem_D(14),xclk,'0','0','1'); xmem_D(14) <= NOT (((NOT N_PZ_909 AND NOT xmem(14)) OR (NOT N_PZ_1165 AND xmem(13) AND NOT xmem(14)) OR (NOT N_PZ_1200 AND NOT xmem(13) AND NOT xmem(14)) OR (N_PZ_1165 AND xmem(13) AND N_PZ_909 AND xmem(14)) OR (N_PZ_1200 AND NOT xmem(13) AND N_PZ_909 AND xmem(14)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(4) AND NOT pbtn.COMB AND Mcompar_ypos_cmp_ge0000_N1))); FDCPE_xmem15: FDCPE port map (xmem(15),xmem_D(15),xclk,'0','0','1'); xmem_D(15) <= NOT (((NOT xmem(15) AND NOT N_PZ_909) OR (NOT sin(10) AND NOT xmem(15) AND NOT xmem(13)) OR (NOT sin(10) AND NOT xmem(15) AND NOT xmem(14)) OR (NOT xmem(15) AND NOT xmem(11) AND xmem(13)) OR (NOT xmem(15) AND NOT N_PZ_1165 AND NOT N_PZ_1200) OR (NOT xmem(15) AND NOT xmem(12) AND xmem(14)) OR (NOT sin(10) AND xmem(15) AND xmem(11) AND N_PZ_1165 AND xmem(13) AND xmem(12) AND xmem(14)) OR (xmem(15) AND NOT xmem(11) AND NOT xmem(10) AND N_PZ_1200 AND NOT xmem(13) AND NOT xmem(12) AND NOT xmem(14)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); xmem_Madd__add0000__or0001 <= ((sin(2) AND xmem(2)) OR (sin(2) AND xmem(1) AND N_PZ_1174) OR (xmem(2) AND xmem(1) AND N_PZ_1174) OR (sin(2) AND sin(1) AND sin(0) AND xmem(0)) OR (sin(1) AND sin(0) AND xmem(2) AND xmem(0))); xmem_Madd__add0000__or0003 <= ((NOT sin(4) AND NOT xmem(4)) OR (NOT sin(4) AND N_PZ_807) OR (NOT xmem(4) AND N_PZ_807)); xmem_Madd__add0000__or0005 <= ((NOT sin(6) AND NOT xmem(6)) OR (NOT sin(6) AND N_PZ_808) OR (NOT xmem(6) AND N_PZ_808)); FDCPE_xpos0: FDCPE port map (xpos(0),xpos_D(0),xclk,'0','0','1'); xpos_D(0) <= NOT (((Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(0)) OR (cos(0) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(0)) OR (NOT cos(0) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT xpos(0)))); FTCPE_xpos1: FTCPE port map (xpos(1),xpos_T(1),xclk,'0','0','1'); xpos_T(1) <= NOT ((NOT cos(1) AND NOT Mcompar_ypos_cmp_ge0000_N1) XOR ((cos(0) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(0)) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(1) AND xpos(1)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(1) AND NOT xpos(1)))); FTCPE_xpos2: FTCPE port map (xpos(2),xpos_T(2),xclk,'0','0','1'); xpos_T(2) <= NOT (((cos(2) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_850) OR (NOT cos(2) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_850) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(2) AND xpos(2)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(2) AND NOT xpos(2)))); FTCPE_xpos3: FTCPE port map (xpos(3),xpos_T(3),xclk,'0','0','1'); xpos_T(3) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xmem(3) AND NOT xpos(3)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(3) AND xpos(3)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_838 AND NOT N_PZ_900)); FTCPE_xpos4: FTCPE port map (xpos(4),xpos_T(4),xclk,'0','0','1'); xpos_T(4) <= NOT (((cos(4) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_838) OR (NOT cos(4) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_900) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(4) AND xpos(4)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(4) AND NOT xpos(4)) OR (cos(4) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(3) AND NOT N_PZ_900) OR (NOT cos(4) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_838 AND NOT xpos(3)))); FTCPE_xpos5: FTCPE port map (xpos(5),xpos_T(5),xclk,'0','0','1'); xpos_T(5) <= NOT (((cos(5) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT Madd_xpos_addsub0000__or0003) OR (NOT cos(5) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND Madd_xpos_addsub0000__or0003) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(5) AND xpos(5)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(5) AND NOT xpos(5)))); FTCPE_xpos6: FTCPE port map (xpos(6),xpos_T(6),xclk,'0','0','1'); xpos_T(6) <= NOT (((cos(6) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_852) OR (NOT cos(6) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_852) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(6) AND xpos(6)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(6) AND NOT xpos(6)))); FTCPE_xpos7: FTCPE port map (xpos(7),xpos_T(7),xclk,'0','0','1'); xpos_T(7) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xmem(7) AND NOT xpos(7)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(7) AND xpos(7)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_840 AND NOT N_PZ_902)); FTCPE_xpos8: FTCPE port map (xpos(8),xpos_T(8),xclk,'0','0','1'); xpos_T(8) <= NOT (((cos(8) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_840) OR (NOT cos(8) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND N_PZ_902) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(8) AND xpos(8)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(8) AND NOT xpos(8)) OR (cos(8) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(7) AND NOT N_PZ_902) OR (NOT cos(8) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_840 AND NOT xpos(7)))); FTCPE_xpos9: FTCPE port map (xpos(9),xpos_T(9),xclk,'0','0','1'); xpos_T(9) <= NOT (((cos(9) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT Madd_xpos_addsub0000__or0007) OR (NOT cos(9) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND Madd_xpos_addsub0000__or0007) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(9) AND xpos(9)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(9) AND NOT xpos(9)))); FTCPE_xpos10: FTCPE port map (xpos(10),xpos_T(10),xclk,'0','0','1'); xpos_T(10) <= NOT (((NOT cos(10) AND N_PZ_1161) OR (cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_1161) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(10) AND xpos(10)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(10) AND NOT xpos(10)))); FTCPE_xpos11: FTCPE port map (xpos(11),xpos_T(11),xclk,'0','0','1'); xpos_T(11) <= ((cos(10) AND NOT xpos(10) AND N_PZ_1161) OR (Mcompar_ypos_cmp_ge0000_N1 AND xmem(11) AND NOT xpos(11)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(11) AND xpos(11)) OR (NOT cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(10) AND NOT N_PZ_1161)); FTCPE_xpos12: FTCPE port map (xpos(12),xpos_T(12),xclk,'0','0','1'); xpos_T(12) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xmem(12) AND NOT xpos(12)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(12) AND xpos(12)) OR (cos(10) AND NOT xpos(10) AND N_PZ_1161 AND NOT xpos(11)) OR (NOT cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(10) AND NOT N_PZ_1161 AND xpos(11))); FTCPE_xpos13: FTCPE port map (xpos(13),xpos_T(13),xclk,'0','0','1'); xpos_T(13) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xmem(13) AND NOT xpos(13)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(13) AND xpos(13)) OR (cos(10) AND NOT xpos(12) AND NOT xpos(10) AND N_PZ_1161 AND NOT xpos(11)) OR (NOT cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(12) AND xpos(10) AND NOT N_PZ_1161 AND xpos(11))); FTCPE_xpos14: FTCPE port map (xpos(14),xpos_T(14),xclk,'0','0','1'); xpos_T(14) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xmem(14) AND NOT xpos(14)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xmem(14) AND xpos(14)) OR (cos(10) AND NOT xpos(13) AND NOT xpos(12) AND NOT xpos(10) AND N_PZ_1161 AND NOT xpos(11)) OR (NOT cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(13) AND xpos(12) AND xpos(10) AND NOT N_PZ_1161 AND xpos(11))); FTCPE_xpos15: FTCPE port map (xpos(15),xpos_T(15),xclk,'0','0','1'); xpos_T(15) <= ((Mcompar_ypos_cmp_ge0000_N1 AND xpos(15) AND NOT xmem(15)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT xpos(15) AND xmem(15)) OR (cos(10) AND NOT xpos(13) AND NOT xpos(12) AND NOT xpos(10) AND N_PZ_1161 AND NOT xpos(11) AND NOT xpos(14)) OR (NOT cos(10) AND NOT Mcompar_ypos_cmp_ge0000_N1 AND xpos(13) AND xpos(12) AND xpos(10) AND NOT N_PZ_1161 AND xpos(11) AND xpos(14))); FTCPE_ymem0: FTCPE port map (ymem(0),ymem_T(0),xclk,'0','0','1'); ymem_T(0) <= ((pbtn.COMB AND cos(0)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(0))); FDCPE_ymem1: FDCPE port map (ymem(1),ymem_D(1),xclk,'0','0','1'); ymem_D(1) <= NOT (((NOT pbtn.COMB AND NOT ymem(1)) OR (NOT N_PZ_810 AND NOT ymem(1)) OR (pbtn.COMB AND cos(1) AND NOT N_PZ_810) OR (pbtn.COMB AND cos(0) AND NOT N_PZ_810 AND NOT ymem(0)) OR (cos(1) AND cos(0) AND NOT ymem(1) AND NOT ymem(0)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FTCPE_ymem2: FTCPE port map (ymem(2),ymem_T(2),xclk,'0','0','1'); ymem_T(2) <= ((cos(2) AND pbtn.COMB AND NOT N_PZ_810) OR (NOT cos(2) AND pbtn.COMB AND N_PZ_810) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(2) AND Mcompar_ypos_cmp_ge0000_N1)); FTCPE_ymem3: FTCPE port map (ymem(3),ymem_T(3),xclk,'0','0','1'); ymem_T(3) <= ((cos(3) AND pbtn.COMB AND NOT ymem_Msub__sub0000__or0002) OR (NOT cos(3) AND pbtn.COMB AND ymem_Msub__sub0000__or0002) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(3))); FTCPE_ymem4: FTCPE port map (ymem(4),ymem_T(4),xclk,'0','0','1'); ymem_T(4) <= ((cos(4) AND pbtn.COMB AND NOT N_PZ_811) OR (NOT cos(4) AND pbtn.COMB AND N_PZ_811) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(4))); FTCPE_ymem5: FTCPE port map (ymem(5),ymem_T(5),xclk,'0','0','1'); ymem_T(5) <= ((pbtn.COMB AND cos(5) AND NOT ymem_Msub__sub0000__or0004) OR (pbtn.COMB AND NOT cos(5) AND ymem_Msub__sub0000__or0004) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(5))); FTCPE_ymem6: FTCPE port map (ymem(6),ymem_T(6),xclk,'0','0','1'); ymem_T(6) <= ((pbtn.COMB AND cos(6) AND NOT N_PZ_812) OR (pbtn.COMB AND NOT cos(6) AND N_PZ_812) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(6))); FTCPE_ymem7: FTCPE port map (ymem(7),ymem_T(7),xclk,'0','0','1'); ymem_T(7) <= ((pbtn.COMB AND cos(7) AND NOT ymem_Msub__sub0000__or0006) OR (pbtn.COMB AND NOT cos(7) AND ymem_Msub__sub0000__or0006) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(7))); FTCPE_ymem8: FTCPE port map (ymem(8),ymem_T(8),xclk,'0','0','1'); ymem_T(8) <= ((pbtn.COMB AND cos(8) AND NOT N_PZ_813) OR (pbtn.COMB AND NOT cos(8) AND N_PZ_813) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB AND ymem(8))); FDCPE_ymem9: FDCPE port map (ymem(9),ymem_D(9),xclk,'0','0','1'); ymem_D(9) <= NOT (((ymem(9) AND N_PZ_1289) OR (NOT ymem(9) AND NOT N_PZ_1289) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem10: FDCPE port map (ymem(10),ymem_D(10),xclk,'0','0','1'); ymem_D(10) <= NOT (((ymem(10) AND N_PZ_1088) OR (NOT ymem(10) AND NOT N_PZ_1088) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem11: FDCPE port map (ymem(11),ymem_D(11),xclk,'0','0','1'); ymem_D(11) <= NOT (((NOT N_PZ_1088 AND NOT ymem(11)) OR (ymem(10) AND NOT cos(10) AND NOT ymem(11)) OR (NOT ymem(10) AND cos(10) AND NOT ymem(11)) OR (ymem(10) AND N_PZ_1088 AND cos(10) AND ymem(11)) OR (NOT ymem(10) AND N_PZ_1088 AND NOT cos(10) AND ymem(11)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem12: FDCPE port map (ymem(12),ymem_D(12),xclk,'0','0','1'); ymem_D(12) <= NOT (((NOT N_PZ_1088 AND NOT ymem(12)) OR (ymem(10) AND NOT cos(10) AND NOT ymem(12)) OR (NOT ymem(10) AND ymem(11) AND NOT ymem(12)) OR (cos(10) AND NOT ymem(11) AND NOT ymem(12)) OR (ymem(10) AND N_PZ_1088 AND cos(10) AND ymem(11) AND ymem(12)) OR (NOT ymem(10) AND N_PZ_1088 AND NOT cos(10) AND NOT ymem(11) AND ymem(12)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem13: FDCPE port map (ymem(13),ymem_D(13),xclk,'0','0','1'); ymem_D(13) <= NOT (((NOT N_PZ_1088 AND NOT ymem(13)) OR (NOT ymem(13) AND NOT N_PZ_1151) OR (NOT ymem(10) AND NOT ymem(13) AND ymem(11)) OR (ymem(10) AND N_PZ_1088 AND cos(10) AND ymem(13) AND ymem(11) AND ymem(12)) OR (NOT ymem(10) AND N_PZ_1088 AND NOT cos(10) AND ymem(13) AND NOT ymem(11) AND NOT ymem(12)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem14: FDCPE port map (ymem(14),ymem_D(14),xclk,'0','0','1'); ymem_D(14) <= NOT (((NOT N_PZ_1088 AND NOT ymem(14)) OR (NOT N_PZ_1151 AND NOT ymem(14)) OR (NOT ymem(10) AND ymem(11) AND NOT ymem(14)) OR (cos(10) AND NOT ymem(13) AND NOT ymem(14)) OR (NOT cos(10) AND ymem(13) AND NOT ymem(14)) OR (ymem(10) AND N_PZ_1088 AND cos(10) AND ymem(13) AND ymem(11) AND ymem(12) AND ymem(14)) OR (NOT ymem(10) AND N_PZ_1088 AND NOT cos(10) AND NOT ymem(13) AND NOT ymem(11) AND NOT ymem(12) AND ymem(14)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(8) AND NOT pcnt(6) AND NOT pcnt(9) AND NOT pcnt(7) AND NOT pcnt(4) AND NOT pbtn.COMB))); FDCPE_ymem15: FDCPE port map (ymem(15),ymem_D(15),xclk,'0','0','1'); ymem_D(15) <= NOT (((NOT ymem(15) AND NOT N_PZ_1088) OR (NOT ymem(15) AND NOT N_PZ_1151) OR (NOT ymem(15) AND NOT ymem(10) AND ymem(13)) OR (NOT ymem(15) AND cos(10) AND NOT ymem(13)) OR (NOT ymem(15) AND NOT cos(10) AND ymem(14)) OR (NOT ymem(15) AND ymem(11) AND NOT ymem(14)) OR (ymem(15) AND ymem(10) AND N_PZ_1088 AND ymem(13) AND N_PZ_1151 AND ymem(14)) OR (ymem(15) AND N_PZ_1088 AND NOT ymem(13) AND NOT ymem(11) AND N_PZ_1151 AND NOT ymem(14)) OR (NOT pcnt(2) AND NOT pcnt(1) AND NOT pcnt(0) AND NOT pcnt(3) AND NOT pcnt(5) AND NOT pcnt(6) AND NOT pcnt(4) AND NOT pbtn.COMB AND Mcompar_ypos_cmp_ge0000_N1))); ymem_Msub__sub0000__or0002 <= ((cos(2) AND NOT ymem(2)) OR (cos(2) AND N_PZ_810) OR (NOT ymem(2) AND N_PZ_810)); ymem_Msub__sub0000__or0004 <= ((cos(4) AND NOT ymem(4)) OR (cos(4) AND N_PZ_811) OR (NOT ymem(4) AND N_PZ_811)); ymem_Msub__sub0000__or0006 <= ((cos(6) AND NOT ymem(6)) OR (cos(6) AND N_PZ_812) OR (NOT ymem(6) AND N_PZ_812)); FDCPE_ypos0: FDCPE port map (ypos(0),ypos_D(0),xclk,'0','0','1'); ypos_D(0) <= NOT (((NOT ymem(0) AND Mcompar_ypos_cmp_ge0000_N1) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(0) AND ypos(0)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(0) AND NOT ypos(0)))); FTCPE_ypos1: FTCPE port map (ypos(1),ypos_T(1),xclk,'0','0','1'); ypos_T(1) <= NOT ((NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(1)) XOR ((ymem(1) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(1)) OR (NOT ymem(1) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(1)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(0) AND ypos(0)))); FTCPE_ypos2: FTCPE port map (ypos(2),ypos_T(2),xclk,'0','0','1'); ypos_T(2) <= NOT (((ymem(2) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(2)) OR (NOT ymem(2) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(2)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(2) AND N_PZ_854) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(2) AND NOT N_PZ_854))); FTCPE_ypos3: FTCPE port map (ypos(3),ypos_T(3),xclk,'0','0','1'); ypos_T(3) <= ((ymem(3) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(3)) OR (NOT ymem(3) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(3)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_842 AND NOT N_PZ_903)); FTCPE_ypos4: FTCPE port map (ypos(4),ypos_T(4),xclk,'0','0','1'); ypos_T(4) <= NOT (((ymem(4) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(4)) OR (NOT ymem(4) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(4)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(4) AND N_PZ_842) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(4) AND N_PZ_903) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(4) AND ypos(3) AND NOT N_PZ_903) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(4) AND NOT N_PZ_842 AND NOT ypos(3)))); FTCPE_ypos5: FTCPE port map (ypos(5),ypos_T(5),xclk,'0','0','1'); ypos_T(5) <= NOT (((ymem(5) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(5)) OR (NOT ymem(5) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(5)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(5) AND NOT Madd_ypos_addsub0000__or0003) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(5) AND Madd_ypos_addsub0000__or0003))); FTCPE_ypos6: FTCPE port map (ypos(6),ypos_T(6),xclk,'0','0','1'); ypos_T(6) <= NOT (((ymem(6) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(6)) OR (NOT ymem(6) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(6)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(6) AND NOT N_PZ_856) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(6) AND N_PZ_856))); FTCPE_ypos7: FTCPE port map (ypos(7),ypos_T(7),xclk,'0','0','1'); ypos_T(7) <= ((ymem(7) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(7)) OR (NOT ymem(7) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(7)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT N_PZ_844 AND NOT N_PZ_905)); FTCPE_ypos8: FTCPE port map (ypos(8),ypos_T(8),xclk,'0','0','1'); ypos_T(8) <= NOT (((ymem(8) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(8)) OR (NOT ymem(8) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(8)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(8) AND N_PZ_844) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(8) AND N_PZ_905) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(8) AND ypos(7) AND NOT N_PZ_905) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(8) AND NOT N_PZ_844 AND NOT ypos(7)))); FTCPE_ypos9: FTCPE port map (ypos(9),ypos_T(9),xclk,'0','0','1'); ypos_T(9) <= NOT (((ymem(9) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(9)) OR (NOT ymem(9) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(9)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(9) AND NOT Madd_ypos_addsub0000__or0007) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(9) AND Madd_ypos_addsub0000__or0007))); FTCPE_ypos10: FTCPE port map (ypos(10),ypos_T(10),xclk,'0','0','1'); ypos_T(10) <= NOT (((ymem(10) AND Mcompar_ypos_cmp_ge0000_N1 AND ypos(10)) OR (NOT ymem(10) AND Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(10)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND sin(10) AND N_PZ_1080) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT sin(10) AND NOT N_PZ_1080))); FTCPE_ypos11: FTCPE port map (ypos(11),ypos_T(11),xclk,'0','0','1'); ypos_T(11) <= ((Mcompar_ypos_cmp_ge0000_N1 AND ymem(11) AND NOT ypos(11)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT ymem(11) AND ypos(11)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND ypos(10) AND NOT sin(10) AND N_PZ_1080) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(10) AND sin(10) AND NOT N_PZ_1080)); FTCPE_ypos12: FTCPE port map (ypos(12),ypos_T(12),xclk,'0','0','1'); ypos_T(12) <= ((Mcompar_ypos_cmp_ge0000_N1 AND ymem(12) AND NOT ypos(12)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT ymem(12) AND ypos(12)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND ypos(10) AND NOT sin(10) AND N_PZ_1080 AND ypos(11)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(10) AND sin(10) AND NOT N_PZ_1080 AND NOT ypos(11))); FTCPE_ypos13: FTCPE port map (ypos(13),ypos_T(13),xclk,'0','0','1'); ypos_T(13) <= ((Mcompar_ypos_cmp_ge0000_N1 AND ymem(13) AND NOT ypos(13)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT ymem(13) AND ypos(13)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND ypos(12) AND ypos(10) AND NOT sin(10) AND N_PZ_1080 AND ypos(11)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(12) AND NOT ypos(10) AND sin(10) AND NOT N_PZ_1080 AND NOT ypos(11))); FTCPE_ypos14: FTCPE port map (ypos(14),ypos_T(14),xclk,'0','0','1'); ypos_T(14) <= ((Mcompar_ypos_cmp_ge0000_N1 AND ymem(14) AND NOT ypos(14)) OR (Mcompar_ypos_cmp_ge0000_N1 AND NOT ymem(14) AND ypos(14)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND ypos(12) AND ypos(10) AND NOT sin(10) AND N_PZ_1080 AND ypos(11) AND ypos(13)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(12) AND NOT ypos(10) AND sin(10) AND NOT N_PZ_1080 AND NOT ypos(11) AND NOT ypos(13))); FTCPE_ypos15: FTCPE port map (ypos(15),ypos_T(15),xclk,'0','0','1'); ypos_T(15) <= ((ypos(15) AND NOT ymem(15) AND Mcompar_ypos_cmp_ge0000_N1) OR (NOT ypos(15) AND ymem(15) AND Mcompar_ypos_cmp_ge0000_N1) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND ypos(12) AND ypos(10) AND NOT sin(10) AND N_PZ_1080 AND ypos(11) AND ypos(13) AND ypos(14)) OR (NOT Mcompar_ypos_cmp_ge0000_N1 AND NOT ypos(12) AND NOT ypos(10) AND sin(10) AND NOT N_PZ_1080 AND NOT ypos(11) AND NOT ypos(13) AND NOT ypos(14))); Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); FDDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); FTDCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); ****************************** Device Pin Out ***************************** Device : XC2C256-7-TQ144 Pin Signal Pin Signal No. Name No. Name 1 VCC 73 VCCIO-1.8 2 KPR 74 KPR 3 KPR 75 KPR 4 KPR 76 KPR 5 KPR 77 KPR 6 KPR 78 KPR 7 KPR 79 KPR 8 VCCAUX 80 KPR 9 KPR 81 KPR 10 KPR 82 KPR 11 KPR 83 KPR 12 KPR 84 VCC 13 KPR 85 KPR 14 KPR 86 KPR 15 KPR 87 KPR 16 KPR 88 KPR 17 KPR 89 GND 18 KPR 90 GND 19 KPR 91 KPR 20 KPR 92 KPR 21 KPR 93 VCCIO-1.8 22 KPR 94 KPR 23 KPR 95 KPR 24 KPR 96 KPR 25 KPR 97 KPR 26 KPR 98 KPR 27 VCCIO-1.8 99 GND 28 KPR 100 KPR 29 GND 101 KPR 30 KPR 102 KPR 31 KPR 103 KPR 32 KPR 104 KPR 33 KPR 105 KPR 34 KPR 106 KPR 35 KPR 107 KPR 36 GND 108 GND 37 VCC 109 VCCIO-1.8 38 iclk 110 KPR 39 KPR 111 KPR 40 KPR 112 KPR 41 KPR 113 KPR 42 KPR 114 KPR 43 KPR 115 KPR 44 blu<4> 116 KPR 45 blu<3> 117 KPR 46 blu<2> 118 KPR 47 GND 119 KPR 48 blu<1> 120 KPR 49 blu<0> 121 KPR 50 grn<5> 122 TDO 51 grn<4> 123 GND 52 grn<3> 124 KPR 53 grn<2> 125 KPR 54 grn<1> 126 KPR 55 VCCIO-1.8 127 VCCIO-1.8 56 grn<0> 128 KPR 57 red<4> 129 KPR 58 red<3> 130 KPR 59 red<2> 131 KPR 60 red<1> 132 KPR 61 red<0> 133 KPR 62 GND 134 KPR 63 TDI 135 KPR 64 vsync 136 KPR 65 TMS 137 KPR 66 hsync 138 KPR 67 TCK 139 KPR 68 pclk 140 KPR 69 KPR 141 VCCIO-1.8 70 KPR 142 KPR 71 KPR 143 btn 72 GND 144 GND Legend : NC = Not Connected, unbonded pin PGND = Unused I/O configured as additional Ground pin KPR = Unused I/O with weak keeper (leave unconnected) WPU = Unused I/O with weak pull up (leave unconnected) TIE = Unused I/O floating -- must tie to VCC, GND or other signal VCC = Dedicated Power Pin VCCAUX = Power supply for JTAG pins VCCIO-3.3 = I/O supply voltage for LVTTL, LVCMOS33, SSTL3_I VCCIO-2.5 = I/O supply voltage for LVCMOS25, SSTL2_I VCCIO-1.8 = I/O supply voltage for LVCMOS18 VCCIO-1.5 = I/O supply voltage for LVCMOS15, HSTL_I VREF = Reference voltage for indicated input standard *VREF = Reference voltage pin selected by software GND = Dedicated Ground Pin TDI = Test Data In, JTAG pin TDO = Test Data Out, JTAG pin TCK = Test Clock, JTAG pin TMS = Test Mode Select, JTAG pin PROHIBITED = User reserved pin **************************** Compiler Options **************************** Following is a list of all global compiler options used by the fitter run. Device(s) Specified : xc2c256-7-TQ144 Optimization Method : DENSITY Multi-Level Logic Optimization : ON Ignore Timing Specifications : OFF Default Register Power Up Value : LOW Keep User Location Constraints : ON What-You-See-Is-What-You-Get : OFF Exhaustive Fitting : OFF Keep Unused Inputs : OFF Slew Rate : FAST Set Unused I/O Pin Termination : KEEPER Global Clock Optimization : ON Global Set/Reset Optimization : ON Global Ouput Enable Optimization : ON Enable Input Registers : ON Function Block Fan-in Limit : 38 Use DATA_GATE Attribute : ON Set Tristate Outputs to Termination Mode : KEEPER Default Voltage Standard for All Outputs : LVCMOS18 Input Limit : 32 Pterm Limit : 28